US4458219A
Expired / Lapsed
US
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Variable phase shifter
Assignee: Raytheon Co
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Filing: 1982-03-01
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Granted: 1984-07-03
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Expires: 2002-03-01
Abstract
Abstract A phase shifter includes three cascade interconnected phase shift stages. Each stage includes a quadrature coupler and a pair of field effect transistors (FET), having a pair of gates, a drain, and a source, connected in a common (grounded) source configuration. The drain of each FET is coupled to an input port of the quadrature coupler to provide two signal paths having an electrical pathlength difference corresponding to a 90° differential phase shift. In the third stage, a length of transmission line is coupled between a drain of one of the FET's and one input port of the coupler to provide a signal path having an electrical pathlength corresponding to a 180° phase shift. An input signal is fed to one of the gates of each FET of the first stage, and voltage level control signals are fed to the second one of gates of each FET of the first stage, to control the amplitude of the signal coupled to each drain. The phase shift of the input signal at the output of the quadrature coupler is selected by controlling the ratio of the amplitudes of the signals coupled to each drain. The phase shift of the input signal through succeeding stages is selected in response to a second set of control signals fed to the second gates of each FET which select the signal paths through each stage.
Inventors
- 👤 James L. Vorhaus
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 18:37
CPC Classifications
H; H01; H01P; H01P1/00; H01P1/18; H01P1/184
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
231 words
A phase shifter comprising: a pair of phase shifter stages, each stage having an input port and an output port comprising: (i) a pair of transistors, each transistor having a pair of control electrodes and an output electrode, with a first one of the control electrodes of each transistor being fed a control signal and a second one of the control electrodes of each transistor being fed an input signal; (ii) means, coupled to the output electrode of each transistor, for providing a pair of signal paths between the output electrodes of each transistor and the output port of such stage, such signal paths having an electrical pathlength difference of 90°; a third phase shift stage having an input port and output port comprising: (i) a pair of transistors, each transistor having a pair of control electrodes and an output electrode, with a first one of the control electrodes of each transistor being fed a control signal and a second one of the control electrodes of each transistor being fed an input signal; (ii) means, coupled to the output electrode of each transistor, for providing a pair of signal paths between the output electrodes of each transistor and the output port of such stage, such signal paths having an electrical pathlength difference of 180°; and wherein the pair of phase shifter stages and the third phase shifter stage are cascade interconnected.
Claim 2
Dependent Claim
231 words
A phase shifter comprising: a pair of phase shifter stages, each stage having an input port and an output port comprising: (i) a pair of transistors, each transistor having a pair of control electrodes and an output electrode, with a first one of the control electrodes of each transistor being fed a control signal and a second one of the control electrodes of each transistor being fed an input signal; (ii) means, coupled to the output electrode of each transistor, for providing a pair of signal paths between the output electrodes of each transistor and the output port of such stage, such signal paths having an electrical pathlength difference of 90°; a third phase shift stage having an input port and output port comprising: (i) a pair of transistors, each transistor having a pair of control electrodes and an output electrode, with a first one of the control electrodes of each transistor being fed a control signal and a second one of the control electrodes of each transistor being fed an input signal; (ii) means, coupled to the output electrode of each transistor, for providing a pair of signal paths between the output electrodes of each transistor and the output port of such stage, such signal paths having an electrical pathlength difference of 180°; and wherein the pair of phase shifter stages and the third phase shifter stage are cascade interconnected.
Claim 3
Dependent Claim
128 words
The phase shifter as recited in claim 1 wherein a first one of such pair of phase shifter stages is fed a first pair of control signals to provide in response thereto a variable phase shift between 0° and 90° with respect to the phase of the input signal; a second one of such pair of phase shifter stages is fed a second different pair of control signals to provide in response thereto a selectable discrete phase shift of 0° or 90° with respect to the phase of the input signal; and a third phase shifter stage is fed a third different pair of control signals to provide in response thereto a discrete phase shift of 0° or 180° with respect to the phase of the input signal.
Claim 4
Dependent Claim
37 words
The phase shifter as recited in claim 2 wherein each one of the phase shifter stages provide a predetermined amount of gain to such input signal as the input signal propagates through each one of said stages.
Claim 5
Dependent Claim
374 words
A phase shifter having an input port and an output port for providing a selectable phase shift to a signal passing between the input port and the output port in accordance with a plurality of control signals fed to the phase shifter comprising: (a) a pair of phase shift stages, each stage having an input terminal and an output terminal, each stage comprising: (i) a first signal path between the input terminal and the output terminal including a first transistor having a pair of control electrodes and an output electrode, a first one of the pair of control electrodes being coupled to the input terminal, and the output electrode being coupled to the output terminal; (ii) a second signal path between the input terminal and the output terminal including a second transistor having a pair of control electrodes and an output electrode, a first one of the pair of control electrodes being coupled to the input terminal, and the output electrode being coupled to the output terminal; (iii) means for providing a 90° pathlength difference between said first and second paths; (b) a third phase shift stage having an input terminal and an output terminal comprising: (i) a first signal path between the input terminal and the output terminal including a first transistor having a pair of control electrodes and an output electrode, a first one of the pair of control electrodes being coupled to the input terminal, and the output electrode being coupled to the output terminal; (ii) a second signal path between the input terminal and the output terminal including a second transistor having a pair of control electrodes and an output electrode, a first one of the pair of control electrodes being coupled to the input terminal, and the output electrode being coupled to the output terminal; (iii) means for providing a 180° pathlength difference between said first and second paths; and (c) wherein the pair of phase shift stages and the third phase shift stage are cascade interconnected between the input port and the output port of the phase shifter and wherein the control signals are fed to a second one of the pair of control electrodes of the transistors in the first pair of stages and the third stage.
Claim 6
Dependent Claim
374 words
A phase shifter having an input port and an output port for providing a selectable phase shift to a signal passing between the input port and the output port in accordance with a plurality of control signals fed to the phase shifter comprising: (a) a pair of phase shift stages, each stage having an input terminal and an output terminal, each stage comprising: (i) a first signal path between the input terminal and the output terminal including a first transistor having a pair of control electrodes and an output electrode, a first one of the pair of control electrodes being coupled to the input terminal, and the output electrode being coupled to the output terminal; (ii) a second signal path between the input terminal and the output terminal including a second transistor having a pair of control electrodes and an output electrode, a first one of the pair of control electrodes being coupled to the input terminal, and the output electrode being coupled to the output terminal; (iii) means for providing a 90° pathlength difference between said first and second paths; (b) a third phase shift stage having an input terminal and an output terminal comprising: (i) a first signal path between the input terminal and the output terminal including a first transistor having a pair of control electrodes and an output electrode, a first one of the pair of control electrodes being coupled to the input terminal, and the output electrode being coupled to the output terminal; (ii) a second signal path between the input terminal and the output terminal including a second transistor having a pair of control electrodes and an output electrode, a first one of the pair of control electrodes being coupled to the input terminal, and the output electrode being coupled to the output terminal; (iii) means for providing a 180° pathlength difference between said first and second paths; and (c) wherein the pair of phase shift stages and the third phase shift stage are cascade interconnected between the input port and the output port of the phase shifter and wherein the control signals are fed to a second one of the pair of control electrodes of the transistors in the first pair of stages and the third stage.
Claim 7
Dependent Claim
170 words
The phase shifter as recited in claim 4 wherein: a first pair of the control signals is fed to second control electrodes of the transistors in a first one of such pair of phase shift stages to provide, in response thereto at the output of such phase shift stage, a variable phase shift between 0° and 90° with respect to the phase of an input signal; a second, different pair of the control signals is fed to second control electrodes of the transistors in a second one of such pair of phase shift stages to provide, in response thereto at the output of such phase shift stage, a selectable discrete phase shift of 0° or 90° with respect to the phase of the input signal; and a third, different pair of the control signals is fed to second control electrodes of transistors of the third phase shift stage to provide, in response thereto, a discrete phase shift of 0° or 180° with respect to the phase of the input signal.
Claim 8
Dependent Claim
37 words
The phase shifter as recited in claim 5 wherein each one of the phase shift stages provides a predetermined amount of gain to such input signal as the input signal propagates through each one of said stages.
Claim 9
Dependent Claim
15 words
The phase shifter as recited in claim 4 wherein the transistors are field effect transistors.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-07-03 | 1988-01-02 | 1988-07-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-07-03 | 1992-01-02 | 1992-07-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-07-03 | 1996-01-02 | 1996-07-03 | $7700.00 | Window Closed / Lapsed |