US4456920A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device
Assignee: Toshiba Corp
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Filing: 1980-10-07
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Granted: 1984-06-26
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Expires: 2000-10-07
Abstract
Abstract A semiconductor device including at least first and second transistors having their respective emitter regions of a first conductivity type formed in a common base layer of a second conductivity type, the semiconductor device comprising a first electrode formed on the emitter region of the first transistor, the first electrode extending on that portion of the base layer which surrounds the emitter region of the second transistor, a second electrode formed on the base layer at the opposite side of the emitter region of the first transistor to that side of the base layer where the second transistor is formed, a first semiconductor region formed in the emitter region of the second transistor, the first semiconductor region having the second conductivity type and extending from the major surface of the emitter region of the second transistor to the base layer, an insulation film formed on the first semiconductor region, a portion of the first semiconductor region being left uncovered with the insulation film, a second semiconductor region formed in the first semiconductor region, the second semiconductor region having the first conductivity type and extending from the surface of the emitter region of the second transistor to the base layer, and a third electrode formed on the emitter region of the second transistor and the first semiconductor region.
Inventors
- 👤 Susumu Iesaka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 21:43
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/641; H10D84/642; H02; H02P; H02P7/00; H02P7/03; H02P7/04; H10D48/00; H10D48/30; H10D48/32; H10D48/34; H10D48/345; H10D84/611; H10D84/613
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
227 words
In a semiconductor device in which an input stage transistor has a first emitter region and an output stage transistor has a second emitter region, said emitter regions being of a first conductivity type and being formed in adjacent portions of a common base layer of a second conductivity type, and in which a substrate layer of said first conductivity type is contiguous with said common base layer and is provided, on a side opposite said common base layer, with an electrode common to both said input and output stage transistors, the combination comprising: a first electrode contacting said first emitter region and surrounding said second emitter region; a second electrode contacting said base layer on a surface thereof adjacent said first emitter region and on a side of said first region away from said second emitter region; a third electrode contacting said second emitter region; a first semiconductor region of said second conductivity type formed within and surrounded by said second emitter region and extending along a line perpendicular to the plane of said common base layer through the depth of said second emitter region whereby a portion of said third electrode is separated from said substrate layer by a continuous region of said second conductivity type; and a second semiconductor region of said first conductivity type formed within and surrounded by said first semiconductor region.
Claim 2
Dependent Claim
227 words
In a semiconductor device in which an input stage transistor has a first emitter region and an output stage transistor has a second emitter region, said emitter regions being of a first conductivity type and being formed in adjacent portions of a common base layer of a second conductivity type, and in which a substrate layer of said first conductivity type is contiguous with said common base layer and is provided, on a side opposite said common base layer, with an electrode common to both said input and output stage transistors, the combination comprising: a first electrode contacting said first emitter region and surrounding said second emitter region; a second electrode contacting said base layer on a surface thereof adjacent said first emitter region and on a side of said first region away from said second emitter region; a third electrode contacting said second emitter region; a first semiconductor region of said second conductivity type formed within and surrounded by said second emitter region and extending along a line perpendicular to the plane of said common base layer through the depth of said second emitter region whereby a portion of said third electrode is separated from said substrate layer by a continuous region of said second conductivity type; and a second semiconductor region of said first conductivity type formed within and surrounded by said first semiconductor region.
Claim 3
Dependent Claim
16 words
A semiconductor device according to claim 1, wherein said first semiconductor region is annular in shape.
Claim 4
Dependent Claim
32 words
A semiconductor device according to claim 2, wherein the annulus width of said first semiconductor region is about 3 to 6 times as great as the depth of said second emitter region.
Claim 5
Dependent Claim
24 words
A semiconductor device according to claim 1, wherein said first semiconductor region is configured as a square in the plane of said base layer.
Claim 6
Dependent Claim
56 words
A semiconductor device according to claim 1 further comprising a third semiconductor region of said second conductivity type formed within and surrounded by said second emitter region and extending through the depth of said region whereby plural portions of said third electrode are separated from said substrate layer by continuous regions of said second conductivity type.
Claim 7
Dependent Claim
31 words
A semiconductor device according to claim 1, further including an insulation film separating a portion of said first semiconductor region and all of said second semiconductor region from said third electrode.
Claim 8
Dependent Claim
35 words
A semiconductor device according to claim 6, wherein the portion of said first semiconductor region not separated from said third electrode by said insulation film is rectangularly shaped in the plane of said base layer.
Claim 9
Dependent Claim
38 words
A semiconductor device according to claim 6, wherein the portion of said first semiconductor region not separated from said third electrode by said insulation film is shaped as a hollow rectangle in the plane of said base layer.
Claim 10
Dependent Claim
35 words
A semiconductor device according to claim 6, wherein the portion of said first semiconductor region not separated from said third electrode by said insulation film is annularly shaped in the plane of said base layer.
Claim 11
Dependent Claim
44 words
A semiconductor device according to claim 6, wherein the width of said portion of the first semiconductor region not separated from said third electrode by said insulation film is about 2.5 to 5.5 times as great as the depth of said second emitter region.
References Cited (Backward Citations)
US4136355A
Cited
US4293868A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-06-26 | 1987-12-26 | 1988-06-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-06-26 | 1991-12-26 | 1992-06-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-06-26 | 1995-12-26 | 1996-06-26 | $7700.00 | Window Closed / Lapsed |