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US4445214A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of controlling message transmission sequence in multi station communication system

Assignee: Harris Corp
•
Filing: 1982-04-22
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Granted: 1984-04-24
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Expires: 2002-04-22
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Abstract

Abstract A communication scheme for a multi station message transmission system involves the transmission of messages from one station to another, a return message from the receiving station and the retransmission of a previously transmitted message if an acknowledgement is not received. Each message, which may or may not contain data, includes a header having a sequence bit and an acknowledge bit. Each station within the communication system stores in memory a transmit sequence bit and a receive sequence bit. The header of each message that is transmitted from a given station contains a sequence bit corresponding to the state of the transmit sequence bit stored at that station. When a message having an acknowledge bit is received, the state of the stored transmit sequence bit is switched. Upon receipt of a data message having a sequence bit that corresponds to that of the stored received sequence bit at that station, the state of the stored received sequence bit is switched and an acknowledge bit-containing message is returned. If the acknowledge bit is not received from receiving station in a predetermined time after the initial transmission, the previously transmitted message is retransmitted. When the state of the sequence bit in the message is different from that of the received sequence bit stored at the station, and incoming message is disregarded.

Inventors

  • 👤 Christopher C. Reynolds
  • 👤 Earl J. Claire
  • 👤 John R. Ellis

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 18:13
CPC Classifications
H; H04; H04M; H04M11/00

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 225 words
A method of controlling the sequence of message transmission between processor-controlled stations in a communication system, where each message includes a header having at least a sequence bit indicating first and second binary states and an acknowledge bit and wherein the message may or may not be a data message, the steps comprising storing in memory at each station a transmit sequence bit and a receive sequence bit; inserting into the header of each message transmitted from a given station a sequence bit having the state of the transmit sequence bit stored at that station; switching the state of the stored transmit sequence bit at a station upon receipt of a message having an acknowledge bit; switching the state of the stored receive sequence bit at a station upon receipt of a data message having a sequence bit whose state corresponds to that of the stored receive sequence bit at that station and returning a message having an acknowledge bit; retransmitting from a given station a message previously transmitted from that station when a message having an acknowledge bit is not received from the receiving station in a predetermined time after initial transmission; and disregarding a message received at a station when the state of the sequence bit in the message is different from the state of the receive sequence bit stored at that station.
Claim 2
Independent Claim 225 words
A method of controlling the sequence of message transmission between processor-controlled stations in a communication system, where each message includes a header having at least a sequence bit indicating first and second binary states and an acknowledge bit and wherein the message may or may not be a data message, the steps comprising storing in memory at each station a transmit sequence bit and a receive sequence bit; inserting into the header of each message transmitted from a given station a sequence bit having the state of the transmit sequence bit stored at that station; switching the state of the stored transmit sequence bit at a station upon receipt of a message having an acknowledge bit; switching the state of the stored receive sequence bit at a station upon receipt of a data message having a sequence bit whose state corresponds to that of the stored receive sequence bit at that station and returning a message having an acknowledge bit; retransmitting from a given station a message previously transmitted from that station when a message having an acknowledge bit is not received from the receiving station in a predetermined time after initial transmission; and disregarding a message received at a station when the state of the sequence bit in the message is different from the state of the receive sequence bit stored at that station.
Claim 3
Dependent Claim 201 words
The method defined by claim 1, further including the steps of detecting system power-up or resynchronization conditions at any given station; inserting a sequence reset bit into the header of a message and switching the state of both the receive sequence bit and the transmit sequence bit to their first binary state as stored at said given station in response to detection of either of said conditions; inserting a sequence reset bit into the header of a message and switching the state of both the receive sequence bit and the transmit sequence bit to their first binary state as stored at said given station in response to detection of either of said conditions; resetting the state of both the receive sequence bit and the transmit sequence bit to their first binary state as stored at a station receiving a message in response to detection of a reset sequence bit in that message and returning a message having an acknowledge bit to the given station; and in response to receipt of said given station of a message having an acknowledge bit while the sequence reset bit is set at that station, returning a message having an acknowledge bit to said receiving station.
Claim 4
Dependent Claim 30 words
The method defined by claim 2, wherein in response to receipt of a message having a reset sequence bit, the state of the sequence bit in that message is ignored.
Claim 5
Dependent Claim 27 words
The method defined by claim 1, wherein the state of the stored receive sequence bit at a station is not switched upon receipt of a non-data message.
Claim 6
Dependent Claim 17 words
The method defined in claim 1, wherein said data messages may include poll data or message data.
Claim 7
Dependent Claim 29 words
The method defined in claim 1, further including the step of inserting into the header of each message a bit indicating whether a response is required to the message.

References Cited (Backward Citations)

US4074232A Cited
US4096355A Cited
JPS5439504A Cited
US4342995A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-04-24 1987-10-24 1988-04-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-04-24 1991-10-24 1992-04-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-04-24 1995-10-24 1996-04-24 $7700.00 Window Closed / Lapsed

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