Apparatus for scrolling a video display

Claim 2

Apparatus for controlling the display of symbols on a raster type display comprising: timing means for generating timing signals; means for providing an index command indicative of a desired offset in the positioning of said symbols on said raster-type display; first memory means for storing graphics data representative of said symbols to be displayed and communicating selected elements of the graphics data to said display in response to received address data; second memory means for storing addresses corresponding to said symbols, and for communicating to the first memory means a selected sequence of said addresses, said sequence selected in response to an offset address; address means for deriving the offset address from the timing signals and an offset determined by a first portion of the index command and for communicating the offset address to the second memory means; and delay means coupled to the address means for receiving a second portion of the index command to selectively delay communication of the graphics data in the first memory means to said display in response to the second portion of the index command

Claim 3

Apparatus as in claim 1 wherein: the index command is a digital word including a plurality of bits; the second portion of the index command comprises the least-significant bits of the digital word; and the first portion of the index command comprises the most-significant bits of the digital word.

Claim 4

The apparatus of claim 1 wherein: the first memory means comprises a programmable read-only memory.

Claim 5

The apparatus of claim 3 wherein the second memory means comprises a random access memory.

Claim 6

The apparatus of claim 4 wherein: said graphics data comprises a digital word having a plurality of bits; and the delay means selectively delays communication of the graphics data to the display by communicating a selected one of the bits in response to the second portion of the index command.

Claim 7

The apparatus of claim 5, wherein the delay means includes shift register means, having an input and a number of outputs, and means responsive to said second portion of said index for selectively communicating one of the shift register means outputs to said display.

Claim 8

The apparatus of claim 1 wherein: the graphics data comprises a digital word having a plurality of bits; and the delay means selectively delays communication of the graphics data to the display by communicating a selected one of the bits in response to the first portion of the index command.

Claim 9

The apparatus of claim 7, wherein the delay means includes shift register means, having an input and a number of outputs, and means responsive to said second portion of said index command for selectively communicating a one of the shift register means outputs to said display.

Claim 10

Apparatus for controlling the display of symbols on a raster type display comprising: timing means for generating timing signals; means for providing an index command indicative of a desired offset in the positioning of said symbols on said display; memory means for storing graphics data representative of said symbols to be displayed, and for communicating sequences selected of the graphics data to said display in response to a received offset address; delay means for selectively delaying communication of the graphics data in the memory means to the display, in response to a first portion of the index command; and address means for communicating the first portion of the index command to the delay means, and for deriving the offset address from the timing signals and a second portion of the index command, and communicating the offset address to the memory means.

Claim 11

Apparatus for controlling the display of symbols on a raster type display comprising: timing means for generating timing signals; means for providing an index command indicative of a desired offset in the positioning of said symbols on said display; memory means for storing graphics data representative of said symbols to be displayed, and for communicating sequences selected of the graphics data to said display in response to a received offset address; delay means for selectively delaying communication of the graphics data in the memory means to the display, in response to a first portion of the index command; and address means for communicating the first portion of the index command to the delay means, and for deriving the offset address from the timing signals and a second portion of the index command, and communicating the offset address to the memory means.

Claim 12

Apparatus as in claim 9 wherein: the index command is a digital word including a plurality of bits; the first portion of the index command comprises the least-significant bits of the digital word; and the second portion of the index command comprises the most-significant bits of the digital word.

Claim 13

The apparatus of claim 10 wherein: the graphics data comprises a digital word having a plurality of bits; and the delay means selectively delays communication of the graphics data to the display by communicating a selected one of the bits in response to the first portion of the index command.

Claim 14

The apparatus of claim 11, wherein the delay means includes shift register means, having an input and a number of outputs, and means responsive to said first portion of said index command for selectively communicating a one of the shift register means outputs to said display.

Claim 15

The apparatus of claim 9 wherein: the graphics data communicated to the display comprises a digital word having a plurality of bits; and the delay means selectively delays communication of the graphics data to the display by communicating a selected one of the bits in response to the first portion of the index command.

Claim 16

The apparatus of claim 13, wherein the delay means includes shift register means, having an input and a number of outputs, and means responsive to said first portion of said index command for selectively communicating a one of the shift register means outputs to said display.

Claim 17

Apparatus for controlling the display of symbols on a raster type display comprising: timing means for generating timing signals; first memory means for storing symbol data representative of said symbols to be displayed and communicating selected elements of the symbol data to said display in response to received address data; second memory means for storing data indicative of the addresses of the symbol data in the first memory means at addresses of the second memory means corresponding to locations on the raster-type display, and for communicating to the first memory means the data stored in selected addresses of the second memory means; address means for generating addresses for addressing the second memory means in synchronism with scanning of the raster type display, under control of the timing signals; indexing means for generating alterable indexing data and providing a portion of the alterable index data to the address means to alter the correspondence between locations on the raster type display and the addresses generated by the address means; and delay means for selectively delaying communication of the symbol data from the first memory means to the raster type display, the delay being controlled by another portion of the alterable index data from said indexing means.

Claim 18

Apparatus for controlling the display of symbols on a raster type display comprising: timing means for generating timing signals; first memory means for storing symbol data representative of said symbols to be displayed and communicating selected elements of the symbol data to said display in response to received address data; second memory means for storing data indicative of the addresses of the symbol data in the first memory means at addresses of the second memory means corresponding to locations on the raster-type display, and for communicating to the first memory means the data stored in selected addresses of the second memory means; address means for generating addresses for addressing the second memory means in synchronism with scanning of the raster type display, under control of the timing signals; indexing means for generating alterable indexing data and providing a portion of the alterable index data to the address means to alter the correspondence between locations on the raster type display and the addresses generated by the address means; and delay means for selectively delaying communication of the symbol data from the first memory means to the raster type display, the delay being controlled by another portion of the alterable index data from said indexing means.

Claim 19

Apparatus in claim 15 wherein: said indexing means generates alterable indexing data in the form of a digital word; said portion of the alterable index data comprises the most significant bits of the digital word; and said other portion of the alterable index data comprises the least significant bits of the digital word.

Claim 20

The apparatus of claim 16 wherein the delay means includes a shift register with input and a number of outputs corresponding to different delays and selecting one of the outputs in response to the least significant bits of the index word for coupling the selected output to the raster type display.

Claim 21

The apparatus of claim 17, wherein the second memory means is a read only memory.

Claim 22

The apparatus of claim 18, further including means for coupling vertical timing signals to the second memory means, the second memory means providing the pictorial data to the raster type display in response to the data addressed in the first memory means and to the vertical timing signals.