Method and circuit for comparing the timekeeping state and contents of a register in an electronic reminder giving timepiece

Claim 1

An actuating circuit for warning means in an electronic timepiece operable whenever at least certain counters within a divider chain arrive at a state corresponding to a predetermined storage state, comprising: a programmable register having a plurality of stages each corresponding to a counter of said divider chain, each of said stages being individually capable of being placed either in said storage state or in a validation state, said validation state comprising a state which the counter may never attain during normal operation; a plurality of comparison circuits respectively associated with each of said stages whereby each said comparison circuit may generate an enabling signal whenever there is coincidence between the state of its associated stage and that of the corresponding counter or whenever the corresponding stage is in said validation state, each comparison circuit comprising a conventional N-bit comparator arranged to receive N number of bits respectively from a counter of the divider chain and the corresponding register stage, an associated OR gate the output of which constitutes an enabling input to a gate circuit means which actuates the warning means, said OR gate receiving an input whenever there is identity between the elements of the two sets of N bits, an associated AND gate arranged to receive the N bits from the register stage as well as an enabling signal and to provide an output whenever the N bits from said register stage represent the code of the validation stage, the output from said AND gate providing a further input to said OR gate; and, said gate circuit means being arranged to actuate said warning means whenever all comparators simultaneously generate said enabling signal.