Electrically interconnected large area photovoltaic cells and method of producing said cells

Claim 2

In a large area photovoltatic cell which comprises a plurality of electrically isolated small area segments sharing a common electrically-conductive substrate upon which a plurality of continuous semiconductor layers are deposited, each small area segment defined by a discrete portion of a transparent conductive coating atop the semiconductor layers, whereby each small area segment is electrically isolated from other small area segments; and a plurality of spaced, electrically-conductive busbars disposed atop and electrically connected to the plurality of small area segments; the improvement comprising, in combination; each of the busbars terminating on the same portion of the surface of the large area cell; an electrically insulating layer between the busbars and the surface therebeneath to prevent short circuiting; an electrically-insulating layer between the busbars and the busbar terminating portion of the large area cell to prevent short circuiting; first connecting means for electrically interconnecting each of the plurality of spaced busbars; and at least one means for providing electrical access to the common substrate from the layered surface of the large area cell, whereby the first connecting means provides a first electrode of the large area photovoltaic cell and the access means provides a second electrode of the large area photovoltaic cell.

Claim 3

A cell as in claim 1, wherein at least one exposed section of the layered substrate surface provides the a second electrode, whereby both electrodes of the large area photovoltaic cell are provided on the upper surface thereof.

Claim 4

A cell as in claim 1, wherein at least one electrically-conductive rivet is secured to the large area cell to electrically communicate with the substrate.

Claim 5

A cell as in claim 1, wherein the busbars terminate within a peripheral border portion of the large area photovoltaic cell.

Claim 6

A cell as in claim 4, wherein the peripheral border of the large area cell is approximately 3/8 of an inch wide.

Claim 7

A cell as in claim 4, wherein at least one section of the substrate is exposed along said peripheral border portion of the large area cell, said at least one section providing the said at least one substrate access means.

Claim 8

A cell as in claim 6, wherein two sections of the substrate are exposed to provide for parallel connection of the large area cell.

Claim 9

A cell as in claim 6, wherein one section of the substrate is exposed to provide for series connection of the large area cell.

Claim 10

A cell as in claim 4, wherein at least one electrically-conductive rivet is secured to the peripheral border portion of the large area cell, said at least one rivet providing the said at least one substrate access means.

Claim 11

A cell as in claim 9, wherein two rivets are secured to provide for parallel connection of the large area cell.

Claim 12

A cell as in claim 9, wherein one rivet is secured to provide for series connection of the large area cell.

Claim 13

A cell as in claim 4, wherein the first connecting means is a single, elongated, metallic strip which electrically connects the busbars.

Claim 14

A cell as in claim 12, wherein the metallic strip is soldered to each of the busbars and a metallic wire is electrically connected to each of the electrical access means.

Claim 15

A cell as in claim 13, wherein the large area photovoltaic cell and electrical intraconnections thereof are encapsulated between upper and lower protective coverings with only the connections to the electrodes thereof extending from the protective coverings.

Claim 16

A cell as in claim 13, wherein one electrical access means is provided and the large area cell is adapted for series connection.

Claim 17

A cell as in claim 13, wherein two electrical access means are provided and a discrete metallic wire is connected to each of the electrical access means to provide for parallel connection of the large area cell.

Claim 18

Electrically interconnected large area photovoltaic cells, each cell comprising a plurality of electrically-isolated, small area segments which share a common electrically conductive substrate upon which a plurality of continuous semiconductor layers are deposited; a plurality of spaced, electrically-conductive busbars disposed atop and electrically insulated from the surface therebeneath, said busbars electrically interconnected to the small area segments of said discrete large area cells; each small area segment defined by a discrete portion of a transparent, conductive coating atop the semiconductor layers, whereby each small area segment is electrically isolated from other small area segments; and wherein each of the busbars of each large area cell terminating on the same portion of the surface of the associated large area cell; said electrically interconnected cells comprising, in combination: an electrically insulating layer applied to the busbar terminating portion of each large area cell to prevent short circuiting; first connecting means for electrically connecting the busbars of each discrete large area cell; at least one means for providing electrical access to the common substrate of each large area cell from the layered surface of each large area cell; and said electrical access means and said first connecting means of adjacent large area cells being electrically interconnected to interconnect said adjacent large area cells.

Claim 19

Electrically interconnected large area photovoltaic cells, each cell comprising a plurality of electrically-isolated, small area segments which share a common electrically conductive substrate upon which a plurality of continuous semiconductor layers are deposited; a plurality of spaced, electrically-conductive busbars disposed atop and electrically insulated from the surface therebeneath, said busbars electrically interconnected to the small area segments of said discrete large area cells; each small area segment defined by a discrete portion of a transparent, conductive coating atop the semiconductor layers, whereby each small area segment is electrically isolated from other small area segments; and wherein each of the busbars of each large area cell terminating on the same portion of the surface of the associated large area cell; said electrically interconnected cells comprising, in combination: an electrically insulating layer applied to the busbar terminating portion of each large area cell to prevent short circuiting; first connecting means for electrically connecting the busbars of each discrete large area cell; at least one means for providing electrical access to the common substrate of each large area cell from the layered surface of each large area cell; and said electrical access means and said first connecting means of adjacent large area cells being electrically interconnected to interconnect said adjacent large area cells.

Claim 20

Interconnected cells as in claim 17, wherein the busbars of each discrete, large area cell terminate within a peripheral border portion thereof.

Claim 21

Interconnected cells as in claim 18, wherein the said at least one electrical access means of each large area cell is provided within the peripheral border portion of that large area cell.

Claim 22

Interconnected cells as in claim 19, wherein the said at least one electrical access means of each large area cell comprises at least one electrically-conductive rivet secured to the peripheral border portion of that cell.

Claim 23

Interconnected cells as in claim 20, wherein each large area cell has two rivets secured thereto, whereby said adjacent large area cells are electrically interconnected in parallel.

Claim 24

Interconnected cells as in claim 20, wherein each large area cell has one rivet secured thereto, whereby said adjacent large area cells are electrically interconnected in series.

Claim 25

Interconnected cells as in claim 19, wherein the said at least one electrical access means of each large area cell comprises at least one exposed section of the layered substrate surface, said section exposed within the peripheral border portion of that large area cell.

Claim 26

Interconnected cells as in claim 23, wherein each large area cell has two sections of the substrate exposed, whereby said adjacent large area cells are electrically interconnected in parallel.

Claim 27

Interconnected cells as in claim 23, wherein each large area cell has one section of the substrate exposed, whereby said adjacent large area cells are electrically interconnected in series.

Claim 28

Interconnected cells as in claim 19, wherein the first connecting means of each large area cell is soldered to the busbars of that cell to provide a first electrode of the large area cells.

Claim 29

Interconnected cells as in claim 26, wherein the first connecting means of each large area cell comprises a single, elongated metallic strip.

Claim 32

A method as in claim 28, wherein the busbars are terminated within a peripheral border portion of the large area cell.

Claim 33

A method as in claim 29, wherein the step of providing said at least one electrical access means includes securing at least one electrically-conductive rivet to the peripheral border portion of the large area solar cell.

Claim 34

A method as in claim 30, wherein two rivets are secured and the large area cell is adapted for parallel connection.

Claim 35

A method as in claim 30, wherein one rivet is secured and the large area cell is adapted for series connection.

Claim 36

A method as in claim 29, wherein the step of providing said at least one electrical access means includes exposing at least one section of the layered substrate surface within the peripheral border portion of the large area cell.

Claim 37

A method as in claim 33, wherein two sections of the substrate are exposed and the large area cell is adapted for parallel connection.

Claim 38

A method as in claim 33, wherein one section of the substrate is exposed and the large area cell is adapted for series connection.

Claim 39

A method as in claim 29, wherein the step of electrically interconnecting the busbars includes the further step of soldering an electrically-conductive, metallic strip to each of the busbars.

Claim 40

A method as in claim 36, including the additional step of encapsulating the electrically-interconnected, large area photovoltaic cell between upper and lower protective coverings with only the connections to the electrodes extending from the coverings.

Claim 43

A method as in claim 38, wherein the busbars of each large area cell are terminated within a peripheral border portion of that cell.

Claim 44

A method as in claim 39, wherein the said at least one electrical access means of each large area cell is provided within the peripheral border portion of that cell.

Claim 45

A method as in claim 40, wherein the said at least one electrical access means of each large area cell comprises at least one electrically-conductive rivet secured to the peripheral border portion of that cell.

Claim 46

A method as in claim 41, wherein two rivets are secured to each large area cell, whereby said adjacent large area cells are electrically-interconnected in parallel.

Claim 47

A method as in claim 41, wherein one rivet is secured to each large area solar cell, whereby said adjacent large area cells are electrically interconnected in series.

Claim 48

A method as in claim 40, wherein the said at least one electrical access means of each large area cell comprises at least one exposed section of the layered substrate surface, said exposed section within the peripheral border portion of that cell.

Claim 49

A method as in claim 44, wherein two sections of the substrate are exposed, whereby said adjacent large area cells are electrically interconnected in parallel.

Claim 50

A method as in claim 44, wherein one section of the substrate is exposed, whereby said adjacent large area cells are electrically interconnected in series.

Claim 51

A method as in claim 38, wherein the step of electrically interconnecting the busbars of each large area solar cell includes the further step of soldering an electrically-conductive metallic strip to the busbars of each large area cell.

Claim 52

A method as in claim 47, including the additional step of encapsulating the electrically-interconnected, large area photovoltaic cells between upper and lower protective coverings.