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US4434479A Expired / Lapsed US ⏱️ 0.0 years remaining

Nonvolatile memory sensing system

Assignee: McDonnell Douglas Corp
•
Filing: 1981-11-02
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Granted: 1984-02-28
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Expires: 2001-11-02
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Abstract

Abstract A sensing system for a nonvolatile memory transistor array employs reference transistors which are substantially identical to the memory transistors within the array and employs means to program the threshold voltage levels of the reference transistors to a lower level than that of the memory transistors within the array such that the changes in the electrical characteristics of both the memory and the reference transistors are proportional over time, the system thereby being rendered self-tracking.

Inventors

  • 👤 Yung J. Chen
  • 👤 Eden Y. C. Mei

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 03:51
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/26; G11C16/28

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 88 words
In a memory system comprising a nonvolatile memory transistor array, a self-tracking sensing apparatus comprising: means to select a nonvolatile memory transistor to be sensed within the array; a reference nonvolatile transistor wherein the reference transistor is substantially identical to the memory transistors in the memory array; means to program the threshold voltage of the reference transistor to a lower level than that of an identically programmed memory transistors; and means to compare the programmed state of the memory transistor with the programmed state of the reference transistor.
Claim 2
Dependent Claim 88 words
In a memory system comprising a nonvolatile memory transistor array, a self-tracking sensing apparatus comprising: means to select a nonvolatile memory transistor to be sensed within the array; a reference nonvolatile transistor wherein the reference transistor is substantially identical to the memory transistors in the memory array; means to program the threshold voltage of the reference transistor to a lower level than that of an identically programmed memory transistors; and means to compare the programmed state of the memory transistor with the programmed state of the reference transistor.
Claim 3
Dependent Claim 12 words
The apparatus of claim 1 wherein the nonvolatile transistors are MNOS transistors.
Claim 4
Dependent Claim 13 words
The apparatus of claim 1 wherein the nonvolatile transistors are floating gate transistors.
Claim 5
Dependent Claim 22 words
The apparatus of claim 1 wherein the means to program the threshold voltage of the reference transistor comprises a voltage reduction circuit.
Claim 6
Dependent Claim 45 words
The apparatus of claim 1 wherein the means to program the threshold voltage of the reference transistor comprises a timing circuit which reduces the duration of the programming means in relation to the duration of the action of the programming means upon a memory transistor.
Claim 7
Dependent Claim 30 words
The apparatus of claim 1 wherein the means to compare the programmed state of the memory transistor with the programmed state of the reference transistor comprises a voltage sensing amplifier.
Claim 8
Dependent Claim 30 words
The apparatus of claim 1 wherein the means to compare the program state of the memory transistor with the programmed state of the reference transistor comprises a current sensing amplifier.

References Cited (Backward Citations)

US4376987A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-02-27 1987-08-29 1988-02-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-02-27 1991-08-29 1992-02-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-02-27 1995-08-29 1996-02-28 $7700.00 Window Closed / Lapsed

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