US4433395A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Apparatus and method for refreshing non-volatile memory
Assignee: Panasonic Holdings Corp
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Filing: 1981-04-27
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Granted: 1984-02-21
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Expires: 2001-04-27
Abstract
Abstract In the refreshing of the memory contents of the non-volatile memory device, a refreshing buffer memory is provided for temporarily storing a data signal of an address to be refreshed. Not only this data signal is stored in the refreshing buffer memory, but also the address of this data signal and the status of the refreshing processes, that is, up to which step of the refreshing routine the refreshing operation has proceeds, is stored in this refreshing buffer memory. Then, even when the power supply is shut off during the course of the refreshing action, at the next chance of the resumption of the power supply, the refreshing routine can correctly be started from the step at which the refreshing routine was previously terminated, thereby the refreshing operation can always be completed correctly.
Inventors
- 👤 Sadahiro Iyehara
- 👤 Kazumi Kawashima
- 👤 Minoru Ueda
- 👤 Keisuke Yamamoto
- 👤 Tatsuhiro Hosokawa
- 👤 Yukio Furuta
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 17:43
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/26; G06; G06F; G06F11/00; G06F11/07; G06F11/14; G06F11/1402; G11C16/34; G11C16/3418; G11C16/3431
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
161 words
An apparatus for refreshing a non-volatile memory having a plural number of addresses comprising: (a) a data register connected to an input-output circuit of said non-volatile memory; (b) an address register connected to an address driver of said non-volatile memory; (c) an input circuit connected to said data register and said address register; (d) a control circuit means including a microcomputer and an instruction ROM; (e) a non-volatile refreshing buffer memory for, in the refreshing operation of said non-volatile memory, temporarily storing the contents of an address selected sequentially from said non-volatile memory; and (f) said control circuit means including means for issuing control signals for reading a data signal out from a selected address of said non-volatile memory, writing said read out data into said non-volatile refreshing buffer memory, reading out said data signal from said non-volatile refreshing buffer memory, and writing said read out data signal again into said selected address from which the data signal was read out.
Claim 2
Independent Claim
161 words
An apparatus for refreshing a non-volatile memory having a plural number of addresses comprising: (a) a data register connected to an input-output circuit of said non-volatile memory; (b) an address register connected to an address driver of said non-volatile memory; (c) an input circuit connected to said data register and said address register; (d) a control circuit means including a microcomputer and an instruction ROM; (e) a non-volatile refreshing buffer memory for, in the refreshing operation of said non-volatile memory, temporarily storing the contents of an address selected sequentially from said non-volatile memory; and (f) said control circuit means including means for issuing control signals for reading a data signal out from a selected address of said non-volatile memory, writing said read out data into said non-volatile refreshing buffer memory, reading out said data signal from said non-volatile refreshing buffer memory, and writing said read out data signal again into said selected address from which the data signal was read out.
Claim 3
Dependent Claim
26 words
An apparatus for refreshing a non-volatile memory in accordance with claim 1 wherein said refreshing buffer memory is provided with an address of said non-volatile memory.
Claim 4
Dependent Claim
39 words
An apparatus for refreshing a non-volatile memory in accordance with claim 1 further comprising a non-volatile refreshing address memory for accessing a selected address of said non-volatile memory wherein said selected address is designated by said refreshing address memory.
Claim 5
Dependent Claim
36 words
An apparatus for refreshing a non-volatile memory in accordance with claim 3 wherein either one or both of said refreshing buffer memory and said refreshing address memory are set in an address of said non-volatile memory.
Claim 6
Dependent Claim
234 words
An apparatus for refreshing a non-volatile memory in accordance with claim 3 further comprising a non-volatile refreshing status memory and means for reading out respectively from said refreshing address memory and said refreshing status memory, a refreshing address signal and a refreshing status signal, means for determining from said refreshing status signal whether the refreshing operation is finished or not, means for reading out a data signal from an address of said data memory designated by said refreshing address memory when said refreshing status signal indicates the finish of a refreshing operation, means for writing said data signal into said refreshing buffer memory, means for writing into said refreshing status memory a refreshing status signal indicating the half-finish of the refreshing operation after said data signal is written into said refreshing buffer memory, means for reading out said data signal from said refreshing buffer memory, means for writing said data signal read out from said refreshing buffer memory into said refreshing address of said data memory, means for writing an address signal of said data memory which is to be refreshed in a next refreshing operation into said refreshing address memory after said data signal is written into said refreshing address of said data memory, and means for reading said data signal of said refreshing address out of said refreshing buffer memory when said refreshing status signal indicates the half-finish of said refreshing process.
Claim 7
Dependent Claim
36 words
An apparatus for refreshing a non-volatile memory in accordance with claim 5 wherein said non-volatile refreshing buffer memory, said refreshing address memory, and said refreshing status memory are set respectively to addresses of said non-volatile memory.
Claim 8
Independent Claim
74 words
A method for refreshing a non-volatile memory having a plural number of addresses comprising the steps of: (a) reading out from an address of said non-volatile memory a data signal, (b) writing said read out data into said non-volatile refreshing buffer memory, (c) reading out said data signal from said non-volatile refreshing buffer memory, and (d) writing said read out data signal again into said address from which the data signal was read out.
Claim 9
Independent Claim
74 words
A method for refreshing a non-volatile memory having a plural number of addresses comprising the steps of: (a) reading out from an address of said non-volatile memory a data signal, (b) writing said read out data into said non-volatile refreshing buffer memory, (c) reading out said data signal from said non-volatile refreshing buffer memory, and (d) writing said read out data signal again into said address from which the data signal was read out.
Claim 10
Dependent Claim
27 words
A method for refreshing a non-volatile memory in accordance with claim 7 wherein some address location in said non-volatile memory is used as the refreshing buffer memory.
Claim 11
Dependent Claim
34 words
A method for refreshing a non-volatile memory in accordance with claim 7 wherein a non-volatile refreshing address memory is utilized and wherein the address to be refreshed is stored in said refreshing address memory.
Claim 12
Dependent Claim
36 words
A method for refreshing a non-volatile memory in accordance with claim 2 wherein either one or both of said refreshing buffer memory and said refreshing address memory are set in an address of said non-volatile memory.
Claim 13
Dependent Claim
213 words
A method for refreshing a non-volatile memory in accordance with claim 9 comprising the following sequential steps in the refreshing process: (a) reading out respectively from said refreshing address memory and said refreshing status memory a refreshing address signal and a refreshing status signal, (b) determining whether said refreshing status signal indicates the finish of the refreshing operation or not, (c) reading out a data signal from an address of said data memory designated by said refreshing address memory when said refreshing status signal indicates the finish of the refreshing operation, (d) writing into said refreshing buffer memory the data signal designated by said refreshing address memory, (e) writing a refreshing status signal indicating the half-finish of the refreshing operation into said refreshing status memory, (f) reading out from said refreshing buffer memory the data signal of said refreshing address, (g) writing into said refreshing address of said data memory the data signal read out to said refreshing buffer memory, (h) writing into said refreshing address memory an address signal of said data memory which is to be refreshed in the next refreshing operation, and (i) returning to step (f) the process of refreshing said non-volatile memory when said refreshing status signal read out in step (a) indicates half-finish of said refreshing process.
Claim 14
Dependent Claim
36 words
A method for refreshing a non-volatile memory in accordance with claim 11 wherein said non-volatile refreshing buffer memory, said refreshing address memory, and said refreshing status memory are set, respectively, to addresses of said non-volatile memory.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-02-20 | 1987-08-22 | 1988-02-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-02-20 | 1991-08-22 | 1992-02-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-02-20 | 1995-08-22 | 1996-02-21 | $7700.00 | Window Closed / Lapsed |