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US4430642A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital-to-analog converter

Assignee: Westinghouse Electric Corp
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Filing: 1981-10-02
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Granted: 1984-02-07
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Expires: 2001-10-02
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Abstract

Abstract Apparatus for decreasing effect of transition of more significant bits in D/A converter reference of A/D converter. A pair of D/A converters are connected in tandem to eliminate transition of more significant bits of half scale. Also, three D/A converters are connected in parallel with each being offset from one another so that the effect of bit transition is minimized and occurs at different steps in analog output.

Inventors

  • 👤 Benjamin F. Weigand
  • 👤 John W. Frech

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 06:59
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/66; H03M1/68; H03M1/12; H03M1/34; H03M1/36; H03M1/361; H03M1/74

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 170 words
Apparatus for converting binary coded digital input signals having most significant and least significant bits into corresponding analog signals, comprising: at least a pair of digital to analog converters, each said converter being effective when activated to receive at its respective input a digital signal and generate at its output a corresponding analog signal; means combining the output of each converter to provide a common analog output; means to apply the digital input signal to at least both said converters, including means modifying the digital input signal to one of said converters to generate an offset of at least one significant bit from the input to another of said converters; and means to apply the digital input signal selectively to one of said converters in accordance with the binary state of a more significant bit of the input signal to obtain the analog signal of the common analog output from the selected converter whereby switching errors are reduced at times when the more significant bits change their respective binary state.
Claim 2
Dependent Claim 170 words
Apparatus for converting binary coded digital input signals having most significant and least significant bits into corresponding analog signals, comprising: at least a pair of digital to analog converters, each said converter being effective when activated to receive at its respective input a digital signal and generate at its output a corresponding analog signal; means combining the output of each converter to provide a common analog output; means to apply the digital input signal to at least both said converters, including means modifying the digital input signal to one of said converters to generate an offset of at least one significant bit from the input to another of said converters; and means to apply the digital input signal selectively to one of said converters in accordance with the binary state of a more significant bit of the input signal to obtain the analog signal of the common analog output from the selected converter whereby switching errors are reduced at times when the more significant bits change their respective binary state.
Claim 3
Dependent Claim 164 words
Apparatus for converting binary coded digital input signals having most significant and least significant bits into corresponding analog signals, comprising: at least a pair of digital to analog converters, each said converter being effective when activated to receive at its respective input a digital signal and generate at its output to corresponding analog signal; means combining the output of each converter to provide a common analog output; means to apply the digital input signal to at least both said converters, including means modifying the digital input signal to one of said converters to generate an offset of at least one significant bit from the input to another of said converters; and a multiplexer connected to the input of each of the converters; means for applying the lesser significant bits of the input signal to each of the multiplexers; and means to apply the digital input signal to one of said multiplexers in accordance with the binary state of one of the more significant bits.
Claim 4
Dependent Claim 164 words
Apparatus for converting binary coded digital input signals having most significant and least significant bits into corresponding analog signals, comprising: at least a pair of digital to analog converters, each said converter being effective when activated to receive at its respective input a digital signal and generate at its output to corresponding analog signal; means combining the output of each converter to provide a common analog output; means to apply the digital input signal to at least both said converters, including means modifying the digital input signal to one of said converters to generate an offset of at least one significant bit from the input to another of said converters; and a multiplexer connected to the input of each of the converters; means for applying the lesser significant bits of the input signal to each of the multiplexers; and means to apply the digital input signal to one of said multiplexers in accordance with the binary state of one of the more significant bits.
Claim 5
Dependent Claim 42 words
Apparatus according to claim 1 wherein the means modifying the digital input signal to one of said converters, comprises: means for incrementing the significant bit of the digital input signal to one of the converters by at least one least significant bit.

References Cited (Backward Citations)

US3317905A Cited
US3588882A Cited
US3582939A Cited
US4016555A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-02-06 1987-08-08 1988-02-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-02-06 1991-08-08 1992-02-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-02-06 1995-08-08 1996-02-07 $7700.00 Window Closed / Lapsed

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