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US4429331A Expired / Lapsed US ⏱️ 0.0 years remaining

Video cipher processing system

Assignee: Faurecia Clarion Electronics Co Ltd
•
Filing: 1981-07-27
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Granted: 1984-01-31
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Expires: 2001-07-27
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Abstract

Abstract A video cipher processing system comprising a detecting means for detecting average tone variation of TV video signals, an extracting means for extracting at random at least some of outputs from the detecting means as a result of the detection and a ciphering means for ciphering video signals by inverting or non-inverting polarities of video signals in response to outputs extracted at random by the extracting means.

Inventors

  • 👤 Ryokichi Kanai

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 21:16
CPC Classifications
H; H04; H04N; H04N7/00; H04N7/16; H04N7/167; H04N7/171; H04N7/1716

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 154 words
In a video cipher processing system for accepting video signals supplied to the input thereof and for providing a ciphered video signal at the output thereof, said cipher processing system including inverting means for controllably selectively inverting said video input signals provided to said processing systems responsively to control signals applied to said inverting means, said inverting means providing said controllably selectively inverted video signals to the output of said processing systems, and tone detecting means for producing signals responsive to changes in the average tone of said video input signals provided to said processing system, said signals produced by said tone detecting means being used to selectively actuate said inverting means to an inverting or a non-inverting condition, the improvement comprising: extracting means for selecting at random some of said signals produced by said tone detecting means; and control means responsive to said random selected signals for actuating said inverting means responsively thereto.
Claim 2
Dependent Claim 154 words
In a video cipher processing system for accepting video signals supplied to the input thereof and for providing a ciphered video signal at the output thereof, said cipher processing system including inverting means for controllably selectively inverting said video input signals provided to said processing systems responsively to control signals applied to said inverting means, said inverting means providing said controllably selectively inverted video signals to the output of said processing systems, and tone detecting means for producing signals responsive to changes in the average tone of said video input signals provided to said processing system, said signals produced by said tone detecting means being used to selectively actuate said inverting means to an inverting or a non-inverting condition, the improvement comprising: extracting means for selecting at random some of said signals produced by said tone detecting means; and control means responsive to said random selected signals for actuating said inverting means responsively thereto.
Claim 3
Dependent Claim 45 words
The system as claimed in claim 1, wherein said extracting means comprises a sampling signal generating circuit and a gate circuit, said gate circuit being supplied with sampling signals from said sampling signal generating circuit and said outputs from said average tone variation detecting means.
Claim 4
Dependent Claim 44 words
The system as claimed in claim 2, wherein said sampling signal generating circuit comprises an oscillator, a flip-flop circuit to which outputs from said oscillator are applied and a NAND gate to which outputs from said oscillator as well as flip-flop circuit are applied.
Claim 5
Dependent Claim 66 words
The system as claimed in claim 3, wherein said gate circuit comprises a differentiating circuit and an AND gate, said differentiating circuit being supplied with outputs from said average tone variation detecting means, one of input terminals of said AND gate being supplied with outputs from said differentiating circuit and the other input terminal of said AND gate being supplied with outputs from said NAND gate.

References Cited (Backward Citations)

GB841627A Cited
US4308556A Cited
US4340906A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-01-30 1987-08-01 1988-01-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-01-30 1991-08-01 1992-01-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-01-30 1995-08-01 1996-01-31 $7700.00 Window Closed / Lapsed

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