US4426616A
Expired / Lapsed
US
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Capacitive measurement system
Assignee: Simmonds Precision Products Inc
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Filing: 1981-10-06
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Granted: 1984-01-17
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Expires: 2001-10-06
Abstract
No abstract record available.
Inventors
- 👤 Lawrence C. Maier
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 01:36
CPC Classifications
G; G01; G01R; G01R27/00; G01R27/02; G01R27/26
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
202 words
A system for measuring the capacitance C of a capacitor independently of the resistance R of a resistor connected in parallel with said capacitor, which comprises: a first source of alternating sinusoidal voltage of a first frequency W 0 ; a second source of alternating sinusoidal voltage of a different second frequency W 1 ; switch means for alternatively connecting said capacitor and parallel resistor to said first and second sources during successive intervals; current measurement means for providing average values of current supplied to said capacitor and parallel resistor, said current measurement means providing an average current value N 0 during an interval with said capacitor and parallel resistor is connected to said first source and providing an average current value N 1 during an interval when said capacitor and parallel resistor are connected to said second source; and computer means for calculating said capacitance in accordance with an equation ##EQU8## where K 0 is a multiplier constant for converting the current value N 0 to an admittance value (W 0 C) 2 +1/R 2 , and K 1 is a multiplier constant for converting the current value N 1 to an admittance value (W 1 C) 2 +1/R 2 .
Claim 2
Independent Claim
202 words
A system for measuring the capacitance C of a capacitor independently of the resistance R of a resistor connected in parallel with said capacitor, which comprises: a first source of alternating sinusoidal voltage of a first frequency W 0 ; a second source of alternating sinusoidal voltage of a different second frequency W 1 ; switch means for alternatively connecting said capacitor and parallel resistor to said first and second sources during successive intervals; current measurement means for providing average values of current supplied to said capacitor and parallel resistor, said current measurement means providing an average current value N 0 during an interval with said capacitor and parallel resistor is connected to said first source and providing an average current value N 1 during an interval when said capacitor and parallel resistor are connected to said second source; and computer means for calculating said capacitance in accordance with an equation ##EQU8## where K 0 is a multiplier constant for converting the current value N 0 to an admittance value (W 0 C) 2 +1/R 2 , and K 1 is a multiplier constant for converting the current value N 1 to an admittance value (W 1 C) 2 +1/R 2 .
Claim 3
Dependent Claim
22 words
A system as described in claim 1, wherein said computer means also calculates the resistance R in accordance with the equation ##EQU9##
Claim 4
Independent Claim
329 words
A system for measuring the capacitance C of a capacitor independently of a resistance R of a resistor connected in parallel with said capacitor, which comprises: a first source of alternating sinusoidal voltage of a first frequency W 0 ; a second source of alternating sinusoidal voltage of a different second frequency W 1 ; a measurement circuit; first switch means for alternatively energizing said measurement circuit from said first and second sources, respectfully; a reference capacitor of known capacitance C ref ; second switch means for alternatively energizing said reference capacitor and said capacitor and parallel resistor combination from said measurement circuit; switch control means for operating said first and second switch means, to dispose these switch means in four arrangements during respective time intervals of a measurement sequence, said four arrangements including: a first arrangement wherein said reference capacitor is energized by said first source, a second arrangement wherein said reference capacitor is energized by said second source, a third arrangement wherein said capacitor and parallel resistor is energized from said first source, and a fourth arrangement wherein said capacitor and parallel resistor is energized from said second source; current measurement means for determining average current values of the measurement circuit, including: an average current value N ref0 , during a time interval when said first and second switch means are disposed in said first arrangement, an average current value N ref1 , during a time interval when said first and second switch means are disposed in said second arrangement, an average current value N 0 , during a time interval when said first and second switch means are disposed in said third arrangement, and an average current value N 1 , during a time interval when said first and second switch means are disposed in said fourth arrangement; and a computer which includes: storage means for including and storing said current values, and calculating means for calculating said capacitance C in accordance with the equation ##EQU10##
Claim 5
Independent Claim
329 words
A system for measuring the capacitance C of a capacitor independently of a resistance R of a resistor connected in parallel with said capacitor, which comprises: a first source of alternating sinusoidal voltage of a first frequency W 0 ; a second source of alternating sinusoidal voltage of a different second frequency W 1 ; a measurement circuit; first switch means for alternatively energizing said measurement circuit from said first and second sources, respectfully; a reference capacitor of known capacitance C ref ; second switch means for alternatively energizing said reference capacitor and said capacitor and parallel resistor combination from said measurement circuit; switch control means for operating said first and second switch means, to dispose these switch means in four arrangements during respective time intervals of a measurement sequence, said four arrangements including: a first arrangement wherein said reference capacitor is energized by said first source, a second arrangement wherein said reference capacitor is energized by said second source, a third arrangement wherein said capacitor and parallel resistor is energized from said first source, and a fourth arrangement wherein said capacitor and parallel resistor is energized from said second source; current measurement means for determining average current values of the measurement circuit, including: an average current value N ref0 , during a time interval when said first and second switch means are disposed in said first arrangement, an average current value N ref1 , during a time interval when said first and second switch means are disposed in said second arrangement, an average current value N 0 , during a time interval when said first and second switch means are disposed in said third arrangement, and an average current value N 1 , during a time interval when said first and second switch means are disposed in said fourth arrangement; and a computer which includes: storage means for including and storing said current values, and calculating means for calculating said capacitance C in accordance with the equation ##EQU10##
Claim 6
Dependent Claim
26 words
A system, as described in claim 3, wherein the resistance R of said resistor is calculated by said calculating means in accordance with the equation ##EQU11##
Claim 7
Independent Claim
526 words
A system for measuring the capacitance C of a capacitor independently of a resistance R of a resistor connected in parallel with said capacitor, which comprises: a first source of alternating sinusoidal voltage of a first frequency W 0 ; a second source of alternating sinusoidal voltage of a different second frequency W 1 ; a measurement circuit which comprises: a first branch including a reference capacitor of known capacitance C ref , and a second branch connected in parallel with said first branch and including said capacitor and parallel resistor; a first switch means for alternately energizing said measurement circuit from said first and second source, respectively; a second switch means, disposed in series with said reference capacitor in said first branch, for alternatively energizing or de-energizing said reference capacitor; a third switch means, disposed in series with said capacitor and parallel resistor or de-energizing said capacitor and parallel resistor; a switch control timer means for operating said first, second, and third switch means to define a plurality of measurement circuit arrangements which occur sequentially in any selected order of occurrence during respective time intervals of a measurement sequence, said circuit arrangements including: a first arrangement wherein said measurement circuit is energized from said first source and said second and third switch means are open, a second arrangement wherein said measurement circuit is energized from said second source and said second and third switch means are open, a third arrangement wherein said measurement circuit is energized from said first source, said second switch means is closed and said third switch means is open, a fourth arrangement wherein said measurement circuit is energized from said second source, said second switch means is closed and said third switch means is open, a fifth arrangement wherein said measurement circuit is energized from said first source, said second switch means is open, and said third switch means is closed, and a sixth arrangement wherein said measurement circuit is energized from said second source, said second switch means is open, and said third switch means is closed; current measurement means for generating a plurality of digitized average current values of the measurement circuit current during respective time intervals of said measurement sequence, said digitized average current value including; a value N O .sbsb.0 which occurs during an interval when said measurement circuit is disposed in said first arrangement, a value O .sbsb.1 which occurs during an interval when said measurement circuit is disposed in said second arrangement, a value N D .sbsb.ref0 which occurs during an interval when said measurement circuit is disposed in said third arrangement, a value N D .sbsb.ref1 which occurs during an interval when said measurement circuit is disposed in said fourth arrangement, a value N D .sbsb.0 which occurs during an interval when said measurement circuit is disposed in said fifth arrangement, and a value N D .sbsb.1 which occurs during an interval when said measurement circuit is disposed in said sixth arrangement; and a computer which includes: storage means for securing and storing said plurality of digitized current values, and calculating means for periodically calculating said capacitance C in accordance with the equation ##EQU12##
Claim 8
Independent Claim
526 words
A system for measuring the capacitance C of a capacitor independently of a resistance R of a resistor connected in parallel with said capacitor, which comprises: a first source of alternating sinusoidal voltage of a first frequency W 0 ; a second source of alternating sinusoidal voltage of a different second frequency W 1 ; a measurement circuit which comprises: a first branch including a reference capacitor of known capacitance C ref , and a second branch connected in parallel with said first branch and including said capacitor and parallel resistor; a first switch means for alternately energizing said measurement circuit from said first and second source, respectively; a second switch means, disposed in series with said reference capacitor in said first branch, for alternatively energizing or de-energizing said reference capacitor; a third switch means, disposed in series with said capacitor and parallel resistor or de-energizing said capacitor and parallel resistor; a switch control timer means for operating said first, second, and third switch means to define a plurality of measurement circuit arrangements which occur sequentially in any selected order of occurrence during respective time intervals of a measurement sequence, said circuit arrangements including: a first arrangement wherein said measurement circuit is energized from said first source and said second and third switch means are open, a second arrangement wherein said measurement circuit is energized from said second source and said second and third switch means are open, a third arrangement wherein said measurement circuit is energized from said first source, said second switch means is closed and said third switch means is open, a fourth arrangement wherein said measurement circuit is energized from said second source, said second switch means is closed and said third switch means is open, a fifth arrangement wherein said measurement circuit is energized from said first source, said second switch means is open, and said third switch means is closed, and a sixth arrangement wherein said measurement circuit is energized from said second source, said second switch means is open, and said third switch means is closed; current measurement means for generating a plurality of digitized average current values of the measurement circuit current during respective time intervals of said measurement sequence, said digitized average current value including; a value N O .sbsb.0 which occurs during an interval when said measurement circuit is disposed in said first arrangement, a value O .sbsb.1 which occurs during an interval when said measurement circuit is disposed in said second arrangement, a value N D .sbsb.ref0 which occurs during an interval when said measurement circuit is disposed in said third arrangement, a value N D .sbsb.ref1 which occurs during an interval when said measurement circuit is disposed in said fourth arrangement, a value N D .sbsb.0 which occurs during an interval when said measurement circuit is disposed in said fifth arrangement, and a value N D .sbsb.1 which occurs during an interval when said measurement circuit is disposed in said sixth arrangement; and a computer which includes: storage means for securing and storing said plurality of digitized current values, and calculating means for periodically calculating said capacitance C in accordance with the equation ##EQU12##
Claim 9
Dependent Claim
27 words
A system, as described in claim 5, wherein the resistance R of said resistor is periodically calculated by said calculating means in accordance with the equation ##EQU13##
Claim 10
Dependent Claim
64 words
A system as described in claim 5, wherein said current measurement means comprises: signal conditioner means for closing the alternating current of said measurement circuit and generating a direct voltage signal proportional to an average value of the measurement circuit alternating current; and digitizer means, connected to receive said direct voltage signal for generating said digitized average current values of the measurement circuit current.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-01-16 | 1987-07-18 | 1988-01-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-01-16 | 1991-07-18 | 1992-01-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-01-16 | 1995-07-18 | 1996-01-17 | $7700.00 | Window Closed / Lapsed |