Power factor controller

Claim 1

A power factor controller for being interposed between an induction motor and an AC power line comprising: (a) an integrating means including an integrating capacitor for charging and generating across said integrating capacitor a voltage having a magnitude that is inversely related to the lag time by which the current of said motor periodically reaches zero later than a preceding zero crossing of the AC power line voltage; said integrating means comprising a signal generator means for generating a signal voltage having a predetermined value during each half period of said AC power line except that it becomes near zero volts at each instance of zero crossing of said power line voltage and remains zero until the following zero crossing of said motor current, and a current limiting resistor, said signal generating means being connected through said current limiting resistor to said integrating capacitor; (b) a ramping capacitor and resistor forming a series circuit that is connected across said integrating capacitor so that the voltage appearing across said integrating capacitor serves to charge said ramping capacitor and to determine the slope of the resulting ramp voltage developed thereacross; (c) a resetting means for periodically discharging said ramping capacitor at each time of zero crossing of said AC line voltage; (d) a detector-threshold means for detecting the sum of said ramp voltage and said integrating capacitor voltage and producing a trigger voltage when said voltage sum reaches a predetermined threshold value; (e) a bidirectional triode thyristor for connecting said motor to said AC power line at each occurrence of said trigger voltage and disconnecting said motor at each occurrence at which said motor current falls to zero; and (f) a DC power supply means; said signal generator means comprising a first grounded-emitter-type transistor amplifier stage powered from said DC supply means having a first bipolar transistor and a first base resistor, said first resistor being connected between the base of said first transistor and the anode/cathode of said thyristor and the cathode/anode of said thyristor being connected to the emitter of said first transistor; and a second grounded-emitter type transistor amplifier stage powered from said DC supply means having a second bipolar transistor and a second base resistor, the base and the emitter of said second transistor adapted to be connected to two lines respectively of said AC power line through said second resistor; and an exclusive OR gate means for producing said signal voltage of a predetermined non-zero value during said each half AC voltage period when the signals at the collectors of said first and second transistors are the same, and for otherwise producing said near zero voltage.