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US4420770A Expired / Lapsed US ⏱️ 0.0 years remaining

Video background generation system

Assignee: Thomson CSF Broadcast Inc
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Filing: 1982-04-05
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Granted: 1983-12-13
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Expires: 2002-04-05
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Abstract

Abstract A system for producing video signals representative of video patterns having operator-selected video attributes is disclosed. A vertical bit memory includes a plurality of vertical entity memories, each vertical entity memory having a memory bit for each line of a video frame. A horizontal bit memory includes a plurality of horizontal entity memories, each horizontal entity memory having a memory bit for each elemental horizontal reference position of a video frame. A vertical address generator is used to access the vertical entity memories in parallel. A horizontal address generator is used to access the horizontal entity memories in parallel. Means are provided for entering in the horizontal entity memories and vertical entity memories, respectively, binary indications of operator-selected horizontal and vertical coordinates defining diagonally opposite corners of operator-selected video patterns for one or more operator-selected entities. A plurality of vertical and horizontal start/stop detectors are provided. Coincidence detectors are provided, one for each entity, each generating an output for its respective entity as a function of coincident outputs from the vertical and horizontal start/stop detectors for the entity. A priority encoder is responsive to the outputs of the coincidence detectors for generating an output designating the highest priority entity that is on at a given time. An entity attribute look-up memory is responsive to the output of the priority encoder to generate output video-representative signals having attributes that were previously stored in said attribute look-up memory.

Inventors

  • 👤 Atlaf Rahman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 17:39
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/64; H04N9/74

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 309 words
For use in conjunction with a video generating apparatus that includes means for producing vertical and horizontal synchronizing signals and clock signals, a system for producing video signals representative of video patterns having operator-selected video attributes, comprising: a vertical bit memory including a plurality of vertical entity memories, each vertical entity memory having a memory bit for each line of a video frame; a horizontal bit memory including a plurality of horizontal entity memories, each horizontal entity memory having a memory bit for each elemental horizontal reference position of a video frame; a vertical address generator for counting scanlines of a video frame and generating vertical entity memory addresses used to access the vertical entity memories in parallel; a horizontal address generator responsive to clock signals for generating horizontal entity memory addresses used to access the horizontal entity memories in parallel; means for entering, in the horizontal entity memories and vertical entity memories, respectively, binary indications of operator-selected horizontal and vertical coordinates defining diagonally opposite corners of operator-selected video patterns for one or more operator-selected entities; a plurality of vertical start/stop detectors, each being responsive to the output of a respective vertical entity memory; a plurality of horizontal start/stop detectors, each being responsive to the output of a respective horizontal entity memory; a plurality of coincidence detectors, one for each entity, each generating an output for its respective entity as a function of coincident outputs from the vertical and horizontal start/stop detectors for the entity; a priority encoder responsive to the outputs of the coincidence detectors for generating an output designating the highest priority entity that is on at a given time; and an entity attribute look-up memory which is responsive to the output of said priority encoder to generate output video-representative signals having attributes that were previously stored in said attribute look-up memory in conjunction with each entity.
Claim 2
Dependent Claim 309 words
For use in conjunction with a video generating apparatus that includes means for producing vertical and horizontal synchronizing signals and clock signals, a system for producing video signals representative of video patterns having operator-selected video attributes, comprising: a vertical bit memory including a plurality of vertical entity memories, each vertical entity memory having a memory bit for each line of a video frame; a horizontal bit memory including a plurality of horizontal entity memories, each horizontal entity memory having a memory bit for each elemental horizontal reference position of a video frame; a vertical address generator for counting scanlines of a video frame and generating vertical entity memory addresses used to access the vertical entity memories in parallel; a horizontal address generator responsive to clock signals for generating horizontal entity memory addresses used to access the horizontal entity memories in parallel; means for entering, in the horizontal entity memories and vertical entity memories, respectively, binary indications of operator-selected horizontal and vertical coordinates defining diagonally opposite corners of operator-selected video patterns for one or more operator-selected entities; a plurality of vertical start/stop detectors, each being responsive to the output of a respective vertical entity memory; a plurality of horizontal start/stop detectors, each being responsive to the output of a respective horizontal entity memory; a plurality of coincidence detectors, one for each entity, each generating an output for its respective entity as a function of coincident outputs from the vertical and horizontal start/stop detectors for the entity; a priority encoder responsive to the outputs of the coincidence detectors for generating an output designating the highest priority entity that is on at a given time; and an entity attribute look-up memory which is responsive to the output of said priority encoder to generate output video-representative signals having attributes that were previously stored in said attribute look-up memory in conjunction with each entity.
Claim 3
Dependent Claim 18 words
Apparatus as defined by claim 1 further comprising keying means for combining said video-representative signals with program video.
Claim 4
Dependent Claim 19 words
Apparatus as defined by claim 1, wherein said start/stop detectors comprise flip-flops and said coincidence detectors comprise AND gates.
Claim 5
Dependent Claim 19 words
Apparatus as defined by claim 2, wherein said start/stop detectors comprise flip-flops and said coincidence detectors comprise AND gates.
Claim 6
Dependent Claim 60 words
A system as defined by claim 1, wherein a frame of video includes interlaced fields of video, and further comprising field correction logic means, operative in conjunction with said vertical address generator, for temporarily changing the scanline count so as to temporarily produce a vertical entity memory address corresponding to an adjacent scanline in the field not presently being scanned.
Claim 7
Dependent Claim 60 words
A system as defined by claim 2, wherein a frame of video includes interlaced fields of video, and further comprising field correction logic means, operative in conjunction with said vertical address generator, for temporarily changing the scanline count so as to temporarily produce a vertical entity memory address corresponding to an adjacent scanline in the field not presently being scanned.
Claim 8
Dependent Claim 60 words
A system as defined by claim 4, wherein a frame of video includes interlaced fields of video, and further comprising field correction logic means, operative in conjunction with said vertical address generator, for temporarily changing the scanline count so as to temporarily produce a vertical entity memory address corresponding to an adjacent scanline in the field not presently being scanned.
Claim 9
Dependent Claim 66 words
The system as defined by claim 5, wherein said field correction logic means includes means for selectively enabling said vertical start/stop detectors to sample outputs from the vertical entity memories for the scanlines of the field being scanned and also for the adjacent scanlines of the other field when said field correction logic means causes the vertical entity memory addresses to correspond to the adjacent scanlines.
Claim 10
Dependent Claim 66 words
The system as defined by claim 6, wherein said field correction logic means includes means for selectively enabling said vertical start/stop detectors to sample outputs from the vertical entity memories for the scanlines of the field being scanned and also for the adjacent scanlines of the other field when said field correction logic means causes the vertical entity memory addresses to correspond to the adjacent scanlines.
Claim 11
Dependent Claim 66 words
The system as defined by claim 7, wherein said field correction logic means includes means for selectively enabling said vertical start/stop detectors to sample outputs from the vertical entity memories for the scanlines of the field being scanned and also for the adjacent scanlines of the other field when said field correction logic means causes the vertical entity memory addresses to correspond to the adjacent scanlines.

References Cited (Backward Citations)

US4218710A Cited
US4245244A Cited
US4281345A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-12-12 1987-06-13 1987-12-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-12-12 1991-06-13 1991-12-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-12-12 1995-06-13 1995-12-13 $7700.00 Window Closed / Lapsed

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