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US4415372A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of making transistors by ion implantations, electron beam irradiation and thermal annealing

Assignee: Toshiba Corp
•
Filing: 1981-10-20
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Granted: 1983-11-15
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Expires: 2001-10-20
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Abstract

Abstract The invention provides a method for fabricating a semiconductor device which comprises the steps of ion-implanting an impurity into a monocrystalline semiconductor substrate; irradiating the region into which the impurity ions have been implanted with an accelerated electron beam under the conditions that the acceleration voltage is 20 to 200 KeV, and the current is 0.01 to 1 mA and the exposure dose is 10 20 to 10 15 /cm 2 ; and carrying out annealing to form a semiconductor region of one conductivity type. According to the present invention, a semiconductor device can be fabricated which has fewer lattice defects and in which the lifetime of the carriers is long.

Inventors

  • 👤 Yutaka Koshino
  • 👤 Toshio Yonezawa
  • 👤 Takashi Ajima
  • 👤 Jiro Ohshima

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 03:57
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/21; H10P30/202; H10P30/204; H10P30/28; H10P95/00; H10P95/90; Y; Y10; Y10S; Y10S148/00; Y10S148/046

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 80 words
A method for fabricating a semiconductor device comprising the steps of: ion-implanting an impurity into a monocrystalline semiconductor substrate; irradiating a region into which said impurity ions have been implanted with an accelerated electron beam under the conditions that an acceleration voltage is 20 to 200 KeV, a current is 0.01 to 1 mA and an exposure dose is 10 12 to 10 15 /cm 2 ; and carrying out annealing to form a semiconductor region of one conductivity type.
Claim 2
Independent Claim 80 words
A method for fabricating a semiconductor device comprising the steps of: ion-implanting an impurity into a monocrystalline semiconductor substrate; irradiating a region into which said impurity ions have been implanted with an accelerated electron beam under the conditions that an acceleration voltage is 20 to 200 KeV, a current is 0.01 to 1 mA and an exposure dose is 10 12 to 10 15 /cm 2 ; and carrying out annealing to form a semiconductor region of one conductivity type.
Claim 3
Dependent Claim 11 words
A method according to claim 1, wherein said semiconductor is silicon.
Claim 4
Dependent Claim 11 words
A method according to claim 1, wherein said semiconductor is germanium.
Claim 5
Dependent Claim 21 words
A method according to claim 1, wherein said annealing is a thermal annealing with a temperature of 1,000° C. or more.
Claim 6
Dependent Claim 19 words
A method according to claim 1, wherein said irradiation conditions comprise an irradiation time of ten minutes or more.

References Cited (Backward Citations)

US3533857A Cited
US3653977A Cited
US3950187A Cited
US4187126A Cited
US4181538A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-11-14 1987-05-16 1987-11-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-11-14 1991-05-16 1991-11-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-11-14 1995-05-16 1995-11-15 $7700.00 Window Closed / Lapsed

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