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US4412140A Expired / Lapsed US ⏱️ 0.0 years remaining

Circuit for reducing current to light emitting diode of optically coupled driver

Assignee: Motorola Solutions Inc
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Filing: 1981-11-19
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Granted: 1983-10-25
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Expires: 2001-11-19
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Abstract

Abstract A circuit is disclosed for reducing the average light emitting diode (LED) current required to latch an output triac. A ring oscillator coupled to a logic means provides a current pulse to the LED that triggers the optically coupled output triac early during each half sinewave. A biasing means for determining the current pulse duration is coupled between the ring oscillator and a.c. and d.c. input terminals.

Inventors

  • 👤 David A. Reynolds

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 23:05
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/78; H03K17/79

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 122 words
A circuit for providing periodic light pulses to an optically coupled light responsive device, said optically coupled light responsive device enabling a substantially continuous current path to a load, said circuit comprising: oscillating means adapted to be coupled to a voltage source for generating a first repetitive signal and a second repetitive signal; logic means coupled to said oscillating means and responsive to said first and second repetitive signals for generating an output, said logic means including a means for removing photogenerated current therein; output means coupled to said logic means and responsive to said output for generating a current pulse; and light emitting means coupled to said output means and responsive to said current pulse for providing said periodic light pulse.
Claim 2
Dependent Claim 122 words
A circuit for providing periodic light pulses to an optically coupled light responsive device, said optically coupled light responsive device enabling a substantially continuous current path to a load, said circuit comprising: oscillating means adapted to be coupled to a voltage source for generating a first repetitive signal and a second repetitive signal; logic means coupled to said oscillating means and responsive to said first and second repetitive signals for generating an output, said logic means including a means for removing photogenerated current therein; output means coupled to said logic means and responsive to said output for generating a current pulse; and light emitting means coupled to said output means and responsive to said current pulse for providing said periodic light pulse.
Claim 3
Dependent Claim 154 words
A circuit for providing periodic light pulses to an optically coupled light responsive device, said optically coupled light responsive device enabling a substantially continuous current path to a load, said circuit comprising: oscillating means adapted to be coupled to a voltage source, including a plurality of load transistors and a plurality of inverting transistors, one of each of said load transistors and one of each of said inverting transistors having collectors coupled therebetween and coupled by their emitters between said voltage source, wherein two of said inverting transistors generate a first and a second repetitive signal; logic means coupled to said oscillating means and responsive to said first and second repetitive signals for generating an output; output means coupled to said logic means and responsive to said output for generating a current pulse; and light emitting means coupled to said output means and responsive to said current pulse for providing said periodic light pulse.
Claim 4
Dependent Claim 154 words
A circuit for providing periodic light pulses to an optically coupled light responsive device, said optically coupled light responsive device enabling a substantially continuous current path to a load, said circuit comprising: oscillating means adapted to be coupled to a voltage source, including a plurality of load transistors and a plurality of inverting transistors, one of each of said load transistors and one of each of said inverting transistors having collectors coupled therebetween and coupled by their emitters between said voltage source, wherein two of said inverting transistors generate a first and a second repetitive signal; logic means coupled to said oscillating means and responsive to said first and second repetitive signals for generating an output; output means coupled to said logic means and responsive to said output for generating a current pulse; and light emitting means coupled to said output means and responsive to said current pulse for providing said periodic light pulse.
Claim 5
Dependent Claim 24 words
The circuit according to claim 2 wherein two of said inverting transistors have a second collector for providing said first and second repetitive signals.
Claim 6
Dependent Claim 29 words
The circuit according to claim 3 wherein said oscillating means includes a current source coupled to said voltage source for generating a low current to drive said load transistors.
Claim 7
Dependent Claim 31 words
The circuit according to claim 3 wherein said oscillating means includes a rectifying means adapted to be coupled to an AC voltage source for providing a rectified voltage to said circuit.
Claim 8
Dependent Claim 44 words
The circuit according to claim 3 wherein said logic means comprises: a first logic control coupled to one of said second collectors; a second logic control coupled to the other second collector; and a logic gate coupled to said first and second logic controls.
Claim 9
Dependent Claim 264 words
A circuit for reducing current supplied to a light emitting device, the circuit being fully integrated on a semiconductor chip and having first and second voltage terminals, the circuit comprising: current source means coupled to said first and second voltage terminals for generating a current; oscillating means coupled to said current source means, said oscillating means comprising: a plurality of load transistors having a control electrode responsive to said generated current and a first and second current electrode; a plurality of inverter transistors having a control electrode and a first and second current electrode, one of each of said load transistors and one of each of said inverter transistors having said first current electrodes coupled therebetween and coupled by said second current electrodes between said first and second voltage terminal, said control electrodes of said inverter transistors responsive to said first current electrode of another of said inverter transistors, two of said inverter transistors having a third current electrode for generating a first and second repetitive signal; logic means coupled to said oscillating means comprising: a first logic control having at least one transistor having a control electrode responsive to said first repetitive signal; a second logic control having at least one transistor having a control electrode responsive to said second repetitive signal; and a logic gate coupled to said first and second logic controls for providing a logic signal; output means responsive to said logic signal for generating a current pulse; and a light emitting device coupled to said output means and responsive to said current pulse for providing a pulse of light.
Claim 10
Dependent Claim 264 words
A circuit for reducing current supplied to a light emitting device, the circuit being fully integrated on a semiconductor chip and having first and second voltage terminals, the circuit comprising: current source means coupled to said first and second voltage terminals for generating a current; oscillating means coupled to said current source means, said oscillating means comprising: a plurality of load transistors having a control electrode responsive to said generated current and a first and second current electrode; a plurality of inverter transistors having a control electrode and a first and second current electrode, one of each of said load transistors and one of each of said inverter transistors having said first current electrodes coupled therebetween and coupled by said second current electrodes between said first and second voltage terminal, said control electrodes of said inverter transistors responsive to said first current electrode of another of said inverter transistors, two of said inverter transistors having a third current electrode for generating a first and second repetitive signal; logic means coupled to said oscillating means comprising: a first logic control having at least one transistor having a control electrode responsive to said first repetitive signal; a second logic control having at least one transistor having a control electrode responsive to said second repetitive signal; and a logic gate coupled to said first and second logic controls for providing a logic signal; output means responsive to said logic signal for generating a current pulse; and a light emitting device coupled to said output means and responsive to said current pulse for providing a pulse of light.
Claim 11
Dependent Claim 37 words
The circuit according to claim 7 further having third and fourth voltage terminals, said circuit including a rectifying means coupled to said third and fourth voltage terminals for providing a rectified voltage to said current source means.
Claim 12
Dependent Claim 46 words
The circuit according to claim 7 further comprising a first and second optically sensitive device coupled between said control electrode of said first and second logic controls, respectively, and said second voltage terminal, for substantially removing photogenerated current in said first and second logic control transistors.
Claim 13
Dependent Claim 27 words
The circuit according to claim 7 further comprising a light responsive device optically coupled to said light emitting device for enabling a current path to a load.

References Cited (Backward Citations)

US3826930A Cited
US3842259A Cited
US4323794A Cited
US4344003A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-10-24 1987-04-25 1987-10-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-10-24 1991-04-25 1991-10-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-10-24 1995-04-25 1995-10-25 $7700.00 Window Closed / Lapsed

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