US4409436A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Stereo pilot signal eliminating circuit for AM stereophonic receiver
Assignee: Pioneer Corp
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Filing: 1981-06-17
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Granted: 1983-10-11
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Expires: 2001-06-17
Abstract
Abstract An AM stereophonic receiver including a stereophonic pilot signal eliminating circuit which substantially completely eliminates a pilot signal in an input stage of a matrix detector. A received AM stereophonic signal, of the type in which the carrier signal is phase-modulated with a sub-signal and amplitude modulated by a main signal, is coupled to a main signal detector and a sub-signal detector. The output of the sub-signal detector is coupled through a band amplifier which produces as an output a signal corresponding to the pilot signal contained in the stereophonic signal. The outputs of the sub-signal detector and main signal detector are coupled to inputs of adder/subtractor circuit in a matrix detector while the output of the band amplifier is also coupled thereto in a phase so as to cancel the pilot signal contained in the output of the sub-signal detector.
Inventors
- 👤 Tatsuo Numata
- 👤 Akira Nishioka
- 👤 Hitoshi Hirata
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 06:30
CPC Classifications
H; H04; H04H; H04H20/00; H04H20/44; H04H20/46; H04H20/47; H04H20/49
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
236 words
An AM stereophonic receiver circuit for an AM stereophonic signal in which a carrier signal is phase modulated by a sub-signal corresponding to a difference between right and left channel signals and amplitude modulated by a main signal corresponding to a sum of said right and left channel signals, comprising: means for receiving and producing an IF signal; a main signal detector having an input coupled to receive said IF signal; a sub-signal detector having an input coupled to receive said IF signal; first and second adder/subtractor circuits, an output of said sub-signal detector being coupled to an addition input of said first adder/subtractor circuit and to a subtraction input of said second adder/subtractor circuit, and an output of said main signal detector being coupled to addition inputs of both said first and second adder/subtractor circuit; and a stereo pilot signal detector circuit having an input coupled to said output of said sub-signal detector, said stereo pilot signal detector circuit producing an output signal corresponding to a pilot signal of a received stereophonic AM modulated signal, said output signal of said stereo pilot signal detector circuit being coupled to a subtraction input of said first adder/subtractor circuit and to an addition input of said second adder/subtractor circuit, a left channel output being produced at an output of said first adder/subtractor circuit and a right channel signal being produced at an output of said second adder/subtractor circuit.
Claim 2
Dependent Claim
236 words
An AM stereophonic receiver circuit for an AM stereophonic signal in which a carrier signal is phase modulated by a sub-signal corresponding to a difference between right and left channel signals and amplitude modulated by a main signal corresponding to a sum of said right and left channel signals, comprising: means for receiving and producing an IF signal; a main signal detector having an input coupled to receive said IF signal; a sub-signal detector having an input coupled to receive said IF signal; first and second adder/subtractor circuits, an output of said sub-signal detector being coupled to an addition input of said first adder/subtractor circuit and to a subtraction input of said second adder/subtractor circuit, and an output of said main signal detector being coupled to addition inputs of both said first and second adder/subtractor circuit; and a stereo pilot signal detector circuit having an input coupled to said output of said sub-signal detector, said stereo pilot signal detector circuit producing an output signal corresponding to a pilot signal of a received stereophonic AM modulated signal, said output signal of said stereo pilot signal detector circuit being coupled to a subtraction input of said first adder/subtractor circuit and to an addition input of said second adder/subtractor circuit, a left channel output being produced at an output of said first adder/subtractor circuit and a right channel signal being produced at an output of said second adder/subtractor circuit.
Claim 3
Dependent Claim
16 words
The receiver of claim 1 wherein said stereo pilot signal detector circuit comprises a band amplifier.
Claim 4
Dependent Claim
40 words
The receiver of claim 2 further comprising a rectifier/smoothing circuit having an input coupled to receive said output signal of said stereo pilot signal detector circuit, an output of said rectifier/smoothing circuit being coupled to operate a stereo pilot lamp.
Claim 5
Dependent Claim
17 words
The receiver of claim 2 wherein said band amplifier comprises an active filter including an operational amplifier.
Claim 6
Dependent Claim
228 words
The receiver of claim 3 wherein said band amplifier comprises a first capacitor having a first terminal coupled to said output of said sub-signal detector; a first resistor having a first terminal coupled to a second terminal of said first capacitor; an operational amplifier having an inverting input coupled to a second terminal of said first resistor and a noninverting input terminal coupled to ground; a second resistor having a first terminal coupled to said inverting input of said operational amplifier and a second terminal coupled to an output of said operational amplifier; a third resistor having a first terminal coupled to said inverting input of said operational amplifier; a fourth resistor having a first terminal coupled to a second terminal of said third resistor and a second terminal coupled to said output of said operational amplifier; a second capacitor having a first terminal coupled to said inverting input of said operational amplifier; a third capacitor having a first terminal coupled to a second terminal of said second capacitor and a second terminal coupled to said output of said operational amplifier; a fifth resistor having a first terminal coupled to said second terminal of said second capacitor and a second terminal coupled to ground; and a fourth capacitor having a first terminal coupled to said second terminal of said third resistor and a second terminal coupled to ground.
Claim 7
Dependent Claim
35 words
The receiver of claim 1 further comprising a limiter circuit coupled to an input of said sub-signal detector wherein said IF signal is coupled through said limiter circuit to said input of said sub-signal detector.
References Cited (Backward Citations)
JPS55109049A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-10-10 | 1987-04-11 | 1987-10-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-10-10 | 1991-04-11 | 1991-10-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-10-10 | 1995-04-11 | 1995-10-11 | $7700.00 | Window Closed / Lapsed |