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US4402073A Expired / Lapsed US ⏱️ 0.0 years remaining

Speech and data communication network

Assignee: VANDRHOFF COMMUNICATIONS Ltd
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Filing: 1981-03-10
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Granted: 1983-08-30
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Expires: 2001-03-10
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Abstract

Abstract The network comprises a two-wire bus (coaxial cable) and a source of synchronizing pulses connected to the bus for marking off TDM cycles of about 125 us duration comprising a control slot and 8 links, i.e. pairs of time slots. The bus links devices, each comprising a microprocessor, TDM interface, bus interface and audio circuits. To set up a call the calling microprocessor finds a non-busy link and addresses in the control slot the called device which acknowledges. The TDM interface of the called device transmits pulses in one slot of the selected link while the TDM interface of the calling device transmits pulses in the other slot of the selected link. The bus interface effects pulse width modulation and demodulation of the pulses for full duplex speech transmission. The microprocessor also sends and receives digital data by the omission of pulses representing 0 bits. The data is formatted in 8-bit bytes framed by single 0 start and stop bits separated by guard bits, so that the longest possible interruption to speech transmission is 10 TDM cycles, i.e. about lms. This is short enough to allow simultaneous transmission of speech of reasonable quality and low rate digital data (e.g. from a keypad).

Inventors

  • 👤 Gerald C. Hammond

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-22 19:54
CPC Classifications
H; H04; H04Q; H04Q11/00; H04Q11/04; H04L; H04L7/00; H04L7/0008; H04M; H04M11/00; H04M11/06; H04M11/068; H04J; H04J3/00; H04J3/02; H04J3/06; H04J3/0635; H04J3/0638; H04J3/0647; H04J3/0685; H04J3/0691; H04L7/04; H04L7/06

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 218 words
A speech and data communication network comprising a two-wire bus, a source of synchronizing pulses connected to the bus, the pulses marking off TDM cycles comprising interleaved time slots, including a control time slot and a plurality of working time slots, a plurality of devices connected to the bus and each including (1) a microprocessor capable of generating and feeding control data pulses into the control time slot, and of responding to data pulses in the control time slot, to establish a channel between a calling device and a called device by selecting a free working time slot, (2) audio processing means for sampling an audio signal and analogue modulating pulses in accordance with the samples to transmit the audio signal, the audio processing means further responding to received analogue modulated pulses to demodulate the audio signal, and (3) a bus interface enabled to transmit or receive the sampled audio signal in the form of analogue modulated pulses in a selected time slot, and wherein the microprocessor is arranged to transmit digital message data by binary modulation of the analog modulated pulses in a selected time slot and to receive digital message data as binary modulated pulses in a selected time slot, whereby the bit value of the digital message data is represented by the absence of pulses.
Claim 2
Dependent Claim 218 words
A speech and data communication network comprising a two-wire bus, a source of synchronizing pulses connected to the bus, the pulses marking off TDM cycles comprising interleaved time slots, including a control time slot and a plurality of working time slots, a plurality of devices connected to the bus and each including (1) a microprocessor capable of generating and feeding control data pulses into the control time slot, and of responding to data pulses in the control time slot, to establish a channel between a calling device and a called device by selecting a free working time slot, (2) audio processing means for sampling an audio signal and analogue modulating pulses in accordance with the samples to transmit the audio signal, the audio processing means further responding to received analogue modulated pulses to demodulate the audio signal, and (3) a bus interface enabled to transmit or receive the sampled audio signal in the form of analogue modulated pulses in a selected time slot, and wherein the microprocessor is arranged to transmit digital message data by binary modulation of the analog modulated pulses in a selected time slot and to receive digital message data as binary modulated pulses in a selected time slot, whereby the bit value of the digital message data is represented by the absence of pulses.
Claim 3
Dependent Claim 20 words
A speech and data communication network according to claim 1, wherein the audio processing means pulse width modulate the pulses.
Claim 4
Dependent Claim 39 words
A speech and data communication network according to claim 2, wherein the synchronising pulse is wider than the widest PWM pulse and each device comprises a digital timer which discriminates synchronising pulses as pulses wider than a predetermined value.
Claim 5
Dependent Claim 48 words
A speech and data communication network according to claim 1, wherein the source of synchronizing pulses also includes means for feeding a low level, high frequency signal on to the bus and each device includes an injection locked oscillator and a frequency divider for providing local timing waveforms.
Claim 6
Dependent Claim 47 words
A speech and data communication network according to claim 1, wherein the microprocessor of a calling device is arranged to find a free time slot by testing slots in turn and treating as free a slot with no pulses therein in a predetermined number of TDM cycles.
Claim 7
Dependent Claim 34 words
A speech and data communication network according to claim 5, wherein data is transmitted as 8-bit bytes framed by a single start and stop 0-bits, and wherein the predetermined number is at least 11.
Claim 8
Dependent Claim 41 words
A speech and data communication network according to claim 1, wherein all messages sent on the control time slot comprise two words containing the addresses of the addressed and addressing devices, followed by at least one further word constituting an instruction.
Claim 9
Dependent Claim 29 words
A speech and data communication network according to claim 1, wherein the time slots other than the control slots are associated in pairs constituting links for full duplex transmission.
Claim 10
Dependent Claim 124 words
A speech and data communication network according to claim 8, wherein the source of synchronizing pulses also feeds a low level, high frequency signal on to the bus and each device includes an injection locked oscillator and a frequency divider providing local timing waveforms, and wherein each device comprises a link counter responsive to one of the local timing waveforms and the microprocessor has a group of pins providing link addresses, a pin carrying a bit signifying whether the device is called or calling and decoding circuitry enabling transmission in one half, selected by the said bit, of the link selected when the link counter state matches the link address from the microprocessor and enabling reception in the other half of the selected link.
Claim 11
Dependent Claim 96 words
A speech and data communication network according to claim 9, wherein the bus interface comprises a modulator with an input terminal for a speech signal, an input terminal for pulses provided during the time that the decoding circuitry enables transmission in each TDM cycle in which the microprocessor provides a signal commanding transmission of a pulse, and an output terminal connected to a shorting switch across the bus, and a demodulator with an output terminal for a speech signal and an input terminal coupled to the bus during the time that the decoding circuitry enables reception.

References Cited (Backward Citations)

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GB1033398A Cited
GB1413690A Cited
GB1411056A Cited
GB1449063A Cited
GB1414574A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-08-29 1987-02-28 1987-08-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-08-29 1991-02-28 1991-08-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-08-29 1995-02-28 1995-08-30 $7700.00 Window Closed / Lapsed

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