Data processing system having an instruction pipeline for processing a transfer instruction

Claim 2

In a data processing system capable of pipeline operation for parallelly executing instructions each consisting of a plurality of process steps including an operand address calculation step, said pipeline operation including the execution of a transfer instruction having a first operand field, a second operand field and a field (L) specifying the number of bytes to be transferred, wherein the transfer is carried out in a plurality of transfer operations, sequentially, such that a predetermined number of bytes are transferred at each transfer operation including first calculation means for calculating a second operand address in said operand address calculation step based on said second operand field; the improvement comprising: second calculation means operating independently of the operation of said first calculation means for calculating a first operand address based only on the first operand field in a process step other than said operand address calculation step.

Claim 3

In a data processing system capable of pipeline operation for parallelly executing instructions each consisting of a plurality of process steps including an operand address calculation step, said pipeline operation including the execution of a transfer instruction having a first operand field, a second operand field and a field (L) specifying the number of bytes to be transferred by transferring the bytes specified in said L field sequentially at a plurality of times with a predetermined number of bytes being transferred each time from storage locations starting from an operand address specified by the second operand to storage locations starting from an operand address specified by the first operand, including first calculation means for calculating a respective first and second operand address for each of said first and second operand fields in said operand address calculation step and for calculating a further second operand address which is said predetermined number higher per transfer than said calculated operand address based on said second operand field; the improvement comprising: second calculation means operating independently of the operation of said first calculation means for calculating a further first operand address in a processing step other than said calculation step which is said predetermined number higher per transfer than said first operand address calculated by said first calculation means based on said first operand field.

Claim 4

In a data processing system capable of pipeline operation for parallelly executing instructions each consisting of a plurality of process steps including an operand address calculation step, said pipeline operation including the execution of a transfer instruction having a first operand field, a second operand field and a field (L) specifying the number of bytes to be transferred by transferring the bytes specified in said L field sequentially at a plurality of times with a predetermined number of bytes being transferred each time from storage locations starting from an operand address specified by the second operand to storage locations starting from an operand address specified by the first operand, including first calculation means for calculating a respective first and second operand address for each of said first and second operand fields in said operand address calculation step and for calculating a further second operand address which is said predetermined number higher per transfer than said calculated operand address based on said second operand field; the improvement comprising: second calculation means operating independently of the operation of said first calculation means for calculating a further first operand address in a processing step other than said calculation step which is said predetermined number higher per transfer than said first operand address calculated by said first calculation means based on said first operand field.

Claim 5

A data processing system according to claim 1 further comprising; detection means for detecting from said L field if said number of bytes to be transferred is larger than a predetermined number; said second calculation means being responsive to said detection means to operate only when said number of bytes to be transferred is larger than said predetermined number for calculating said first operand address.

Claim 6

A data processing system according to claim 2 further comprising; detection means for detecting from said L field if said number of bytes to be transferred is larger than a predetermined number; said second calculation means being responsive to said detection means to operate only when said number of bytes to be transferred is larger than said predetermined number for calculating said first operand address.

Claim 7

A data processing system according to claim 2 or 4 further comprising; a plurality of general purpose registers; said first operand field and said second operand field each having a first portion for specifying one of said general purpose registers and a second portion for specifying a displacement; said first calculation means including means for calculating said operand address specified by said operand field by adding said displacement to the content of said one general purpose register specified by said first portion.

Claim 8

In a data processing system for executing a transfer instruction having a first operand field, a second operand field and a field (L) for specifying the number of bytes to be transferred and including a plurality of means adapted to operate independently of each other for executing different processing steps at the same time, said plurality of means comprising: a storage; first calculation means for calculating a second operand address based on said second operand field; means responsive to said second operand address to table-look-up a buffer storage; means responsive to said table look-up means for fetching an operand at said table-looked-up address from said storage; means for executing a process using said fetched operand; means for transferring the execution result of said executing means to said storage; and means for storing the transferred data in said storage at a storage location designated by a first operand address based on said first operand field; the improvement comprising: second calculation means operative independently of said first calculation means for calculating said first operand address relating to the instruction executed by said executing means.

Claim 9

In a data processing system for executing a transfer instruction having a first operand field, a second operand field and a field (L) for specifying the number of bytes to be transferred and including a plurality of means adapted to operate independently of each other for executing different processing steps at the same time, said plurality of means comprising: a storage; first calculation means for calculating a second operand address based on said second operand field; means responsive to said second operand address to table-look-up a buffer storage; means responsive to said table look-up means for fetching an operand at said table-looked-up address from said storage; means for executing a process using said fetched operand; means for transferring the execution result of said executing means to said storage; and means for storing the transferred data in said storage at a storage location designated by a first operand address based on said first operand field; the improvement comprising: second calculation means operative independently of said first calculation means for calculating said first operand address relating to the instruction executed by said executing means.

Claim 10

In a data processing system responsive to a transfer instruction having a first operand field, a second operand field and a field (L) for specifying the number of bytes to be transferred for transferring a number of data bytes specified by said L field at a time, from storage locations starting from a second operand address specified by the second operand field to storage locations starting from a first operand address specified by the first operand field of the transfer instruction, and including a plurality of means operative independently of each other for executing different process steps at the same time, said plurality of means comprising: a storage; first calculation means for calculating said second operand address; means responsive to said second operand address to table look-up a buffer storage; means responsive to said table look-up means for fetching an operand at said table looked-up address from said storage; means for executing a process using said fetched operand; means for transferring the execution result of said executing means; and means for storing the transferred data in said storage at a stroage location designated by said first operand address; an improvement which comprises; said first calculation means including means for calculating said first and second operand addresses specified by said first and second operand fields and further means for calculating a further second operand address which is greater than said calculated second operand address by the number of data bytes transferred at a time; and second calculation means independent of said first calculation means for calculating a further first operand address which is greater than said first operand address calculated by said first calculation means by the number of data bytes transferred at a time.

Claim 11

In a data processing system responsive to a transfer instruction having a first operand field, a second operand field and a field (L) for specifying the number of bytes to be transferred for transferring a number of data bytes specified by said L field at a time, from storage locations starting from a second operand address specified by the second operand field to storage locations starting from a first operand address specified by the first operand field of the transfer instruction, and including a plurality of means operative independently of each other for executing different process steps at the same time, said plurality of means comprising: a storage; first calculation means for calculating said second operand address; means responsive to said second operand address to table look-up a buffer storage; means responsive to said table look-up means for fetching an operand at said table looked-up address from said storage; means for executing a process using said fetched operand; means for transferring the execution result of said executing means; and means for storing the transferred data in said storage at a stroage location designated by said first operand address; an improvement which comprises; said first calculation means including means for calculating said first and second operand addresses specified by said first and second operand fields and further means for calculating a further second operand address which is greater than said calculated second operand address by the number of data bytes transferred at a time; and second calculation means independent of said first calculation means for calculating a further first operand address which is greater than said first operand address calculated by said first calculation means by the number of data bytes transferred at a time.

Claim 12

A data processing system according to claim 6 further comprising; detection means for detecting from said L field if said number of bytes to be transferred is larger than a predetermined number; said second calculation means being responsive to said detection means to operate only when said number of bytes to be transferred is larger than said predetermined number for calculating said first operand address.

Claim 13

A data processing system according to claim 7 further comprising; detection means for detecting from said L field if said number of bytes to be transferred is larger than a predetermined number; said second calculation means being responsive to said detection means for operating only when said number of bytes to be transferred is larger than said predetermined number for calculating said further first operand address.

Claim 14

A data processing system according to claim 7 or 9 further comprising; a plurality of general purpose registers; said first operand field and said second operand field each having a first portion for specifying one of said general purpose registers and a second portion for specifying a displacement; said first calculation means calculating the operand address specified by said operand field by adding said displacement to the content of said one general purpose register specified by said first portion.

Claim 15

In a data processing system for executing a transfer instruction having a first operand field, a second operand field and a field (L) for specifying the number of bytes to be transferred, the improvement comprising; first calculation means for calculating first and second operand addresses based on said first and second operand field, respectively; and second calculation means operative independently of said first calculation means for calculating a further address based on said first operand address calculated by said first calculation means.

Claim 16

In a data processing system for executing a transfer instruction having a first operand field, a second operand field and a field (L) for specifying the number of bytes to be transferred, the improvement comprising; first calculation means for calculating first and second operand addresses based on said first and second operand field, respectively; and second calculation means operative independently of said first calculation means for calculating a further address based on said first operand address calculated by said first calculation means.

Claim 17

In a data processing system for executing a transfer instruction having a first operand field, a second operand field and a field (L) for specifying the number of bytes to be transferred by transferring a number of data bytes specified by said L field, a predetermined number of bytes at a time, from storage locations starting from a second operand address specified by the second operand field to storage locations starting from a first operand address specified by the first operand field, the improvement comprising; first calculation means for calculating said first and second operand addresses specified by said first and second operand fields and for calculating a further second operand address which is said predetermined number higher per transfer than said calculated second operand address; and second calculation means operative independently of said first calculation means for calculating a further first operand address which is said predetermined number higher per transfer than said first operand address calculated by said first calculation means based on said first operand field.

Claim 18

In a data processing system for executing a transfer instruction having a first operand field, a second operand field and a field (L) for specifying the number of bytes to be transferred by transferring a number of data bytes specified by said L field, a predetermined number of bytes at a time, from storage locations starting from a second operand address specified by the second operand field to storage locations starting from a first operand address specified by the first operand field, the improvement comprising; first calculation means for calculating said first and second operand addresses specified by said first and second operand fields and for calculating a further second operand address which is said predetermined number higher per transfer than said calculated second operand address; and second calculation means operative independently of said first calculation means for calculating a further first operand address which is said predetermined number higher per transfer than said first operand address calculated by said first calculation means based on said first operand field.

Claim 19

A data processing system according to claim 12 further comprising; a plurality of general purpose registers; said first operand field and said second operand fields each having a first portion for specifying one of said general purpose registers and a second portion for specifying a displacement; said first calculation means calculating said operand address by adding said displacement to the content of said one general purpose register specified by said first portion.