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US4398205A Expired / Lapsed US ⏱️ 0.0 years remaining

Gate turn-off device with high turn-off gain

Assignee: Eaton Corp
•
Filing: 1980-09-08
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Granted: 1983-08-09
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Expires: 2000-09-08
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Abstract

Abstract A gate turn-off device is disclosed having a load current carrying power transistor regeneratively collector-base coupled with another transistor, and includes a third, shunting transistor providing high gain turn-off. The device is turned ON by signal current of one polarity applied to the base of the power transistor driving the latter into conduction to carry load current, and the device remains ON upon removal of the signal due to base drive supplied by the collector of the other transistor in the regenerative loop. A third transistor is connected to one of the collector-base junctions to shuntingly break the regenerative loop when the third transistor is biased into conduction, thus providing higher gain turn-off. A single ON-OFF control terminal is disclosed, as well as separate ON and OFF control terminals.

Inventors

  • 👤 Gordon B. Spellman
  • 👤 Herman P. Schutten
  • 👤 Stanley V. Jaskolski

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 22:11
CPC Classifications
H; H10; H10D; H10D18/00; H10D18/60

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 403 words
A monolithically integrated turn-off semiconductor switch device comprising: a pair of main terminals for carrying load current; a control terminal which enables said device to be turned ON by a signal current of one polarity and turned OFF by a signal current of opposite polarity; first non-regenerative switch means comprising a power transistor formed vertically in a substrate by first, second, and third regions of alternating conductivity types; a diode formed by fourth and fifth regions of opposite conductivity types in series with the aforementioned regions of said vertical transistor but separated therefrom by a sixth region of said substrate doped to provide low minority carrier lifetimes therein and prevent vertical regenerative action between said diode and said vertical transistor; said fourth region of said diode being disposed on a bottom surface of said substrate and ohmically connected to one of said main terminals and; said third region of said vertical transistor being disposed on the top surface of said substrate and ohmically connected to the other of said main terminals; second non-regenerative switching means comprising a transistor of opposite conductivity type to said vertical transistor laterally formed in said substrate by said first region of said vertical transistor, and by a seventh and an eighth regions of alternating conductivity types, said seventh region being disposed on the top surface of said substrate and ohmically connected to said one of said main terminals, and said eighth region also being disposed on the top surfaces of said substrate; said first and second individually non-regenerative switching means being parasitically isolated from each other on said substrate, but regeneratively coupled to supply each other's base drive current and form a regenerative current loop therebetween, and said control terminal being connected to said regenerative coupling such that application of signal current of said one polarity initiates regenerative loop current between said first and second individually non-regenerative switching means; and third non-regenerative switching means comprising a third transistor monolithically integrated laterally in said substrate and parasitically isolated from said vertical and lateral transistors and said diode and comprising ninth, tenth and eleventh regions of alternating conductivity types, said third switching means having ohmic connections to said regenerative loop and said other of said main terminals such that upon application of base drive signal current thereto being rendered conducting to shunt current from said regenerative loop to thereby render said first switching means non-conductive to turn off said device.
Claim 2
Dependent Claim 403 words
A monolithically integrated turn-off semiconductor switch device comprising: a pair of main terminals for carrying load current; a control terminal which enables said device to be turned ON by a signal current of one polarity and turned OFF by a signal current of opposite polarity; first non-regenerative switch means comprising a power transistor formed vertically in a substrate by first, second, and third regions of alternating conductivity types; a diode formed by fourth and fifth regions of opposite conductivity types in series with the aforementioned regions of said vertical transistor but separated therefrom by a sixth region of said substrate doped to provide low minority carrier lifetimes therein and prevent vertical regenerative action between said diode and said vertical transistor; said fourth region of said diode being disposed on a bottom surface of said substrate and ohmically connected to one of said main terminals and; said third region of said vertical transistor being disposed on the top surface of said substrate and ohmically connected to the other of said main terminals; second non-regenerative switching means comprising a transistor of opposite conductivity type to said vertical transistor laterally formed in said substrate by said first region of said vertical transistor, and by a seventh and an eighth regions of alternating conductivity types, said seventh region being disposed on the top surface of said substrate and ohmically connected to said one of said main terminals, and said eighth region also being disposed on the top surfaces of said substrate; said first and second individually non-regenerative switching means being parasitically isolated from each other on said substrate, but regeneratively coupled to supply each other's base drive current and form a regenerative current loop therebetween, and said control terminal being connected to said regenerative coupling such that application of signal current of said one polarity initiates regenerative loop current between said first and second individually non-regenerative switching means; and third non-regenerative switching means comprising a third transistor monolithically integrated laterally in said substrate and parasitically isolated from said vertical and lateral transistors and said diode and comprising ninth, tenth and eleventh regions of alternating conductivity types, said third switching means having ohmic connections to said regenerative loop and said other of said main terminals such that upon application of base drive signal current thereto being rendered conducting to shunt current from said regenerative loop to thereby render said first switching means non-conductive to turn off said device.
Claim 3
Dependent Claim 98 words
A monolithically integrated gate turn off semiconductor switching device according to claim 1 wherein said second region of said vertical transistor and said ninth region of said last specified lateral transistor are ohmically connected to said control electrode, and wherein a second control electrode is provided and ohmically connected to said tenth region of said last specified lateral transistor, said second control electrode upon application of a signal current of said one polarity rendering said last specified transistor conducting to effect interruption of current flow in the regenerative loop between said vertical and the first mentioned lateral transistor.
Claim 4
Dependent Claim 100 words
A monolithically integrated gate turn off semiconductor switching device according to claim 1 together with a second diode formed in the top surface of said substrate and parasitically isolated from said transistors and the first mentioned diode on said substrate, said second diode having ohmic connection with said control electrode, said regenerative loop, and to said last specified lateral transistor, said control terminal when subjected to a control signal of a polarity opposite said one polarity rendering said last specified transistor conducting to effect interruption of current flow in the regenerative loop between said vertical and first mentioned lateral transistor.

References Cited (Backward Citations)

US3524113A Cited
US3979766A Cited
US4015143A Cited
US4112315A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-08-08 1987-02-07 1987-08-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-08-08 1991-02-07 1991-08-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-08-08 1995-02-07 1995-08-09 $7700.00 Window Closed / Lapsed

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