Frequency synthesizers

Claim 2

A stage for a frequency synthesizer, for producing an adjustable frequency whose value determines the value of one of the digits in the synthesized output frequency, the stage comprising means responsive to a predetermined reference frequency to produce multiples thereof lying within a predetermined frequency range, selectively-settable bandpass filter means for selecting one of the multiples, frequency dividing means connected to receive the selected multiple to produce a control frequency, controllable oscillator means producing the said adjustable frequency, phase-locked loop means connected to control the frequency of the controllable oscillator means in dependence on the said control frequency and on the adjustable frequency of a preceding stage, and pre-setting means producing a control signal connected to selectively set the bandpass filter means.

Claim 3

A stage according to claim 1, in which the phase-locked loop means comprises frequency mixing means connected to receive the said control frequency and the output of the controllable oscillator means, phase comparing means connected to compare the phase of the difference-frequency output of the mixing means with the phase of the adjustable frequency of the said preceding difference detected, and means feeding this signal to control the frequency of the controllable oscillator means, so as to set the controllable oscillator means to produce the adjustable frequency in dependence on the sum of the control frequency and the adjustable frequency of the preceding stage.

Claim 4

A stage according to claim 1, in which the controllable oscillator means is responsive to the said control signal so as to be set by it to approximately the correct value to produce phase lock in the phase-locked loop.

Claim 5

A frequency synthesizer, comprising an initial stage producing an adjustable frequency, a series of intermediate stages each producing a respective adjustable frequency and all connected in cascade so as each to receive the adjustable frequency of the preceding stage and with the first intermediate stage of the series connected to receive the adjustable frequency of the said initial stage, and a final stage connected to receive the adjustable frequency of the last intermediate stage in the said series, each stage producing a respective control frequency and including adjustable multiplying means for individually setting the value of that control frequency and output means responsive to the control frequency to produce the adjustable frequency of that stage, the output means of all the stages except the initial stage being in the form of a phase-locked loop including respective controllable oscillator means and having respective phase comparing means connected to compare the phase of the difference between the control frequency of that stage and the output of the controllable oscillator means of that stage with the phase of the adjustable frequency of the preceding stage so as to produce a signal dependent on any phase difference detected for setting the controllable oscillator means of that stage to a value to minimise that phase difference, each multiplying means comprising means responsive to a predetermined reference frequency to produce a plurality of multiples thereof lying in a respective predetermined frequency range, selectively settable bandpass filter means for selecting a particular one of the multiples, and frequency dividing means for dividing the selected multiples to produce the said control frequency, and control means for producing for each stage a respective first control signal for selectively setting the bandpass filter means of that stage, and means feeding to the controllable oscillator means of each stage a respective second control signal so as to set the oscillator means to approximately the frequency as exists at phase-lock.

Claim 6

A frequency synthesizer, comprising an initial stage producing an adjustable frequency, a series of intermediate stages each producing a respective adjustable frequency and all connected in cascade so as each to receive the adjustable frequency of the preceding stage and with the first intermediate stage of the series connected to receive the adjustable frequency of the said initial stage, and a final stage connected to receive the adjustable frequency of the last intermediate stage in the said series, each stage producing a respective control frequency and including adjustable multiplying means for individually setting the value of that control frequency and output means responsive to the control frequency to produce the adjustable frequency of that stage, the output means of all the stages except the initial stage being in the form of a phase-locked loop including respective controllable oscillator means and having respective phase comparing means connected to compare the phase of the difference between the control frequency of that stage and the output of the controllable oscillator means of that stage with the phase of the adjustable frequency of the preceding stage so as to produce a signal dependent on any phase difference detected for setting the controllable oscillator means of that stage to a value to minimise that phase difference, each multiplying means comprising means responsive to a predetermined reference frequency to produce a plurality of multiples thereof lying in a respective predetermined frequency range, selectively settable bandpass filter means for selecting a particular one of the multiples, and frequency dividing means for dividing the selected multiples to produce the said control frequency, and control means for producing for each stage a respective first control signal for selectively setting the bandpass filter means of that stage, and means feeding to the controllable oscillator means of each stage a respective second control signal so as to set the oscillator means to approximately the frequency as exists at phase-lock.