US4393479A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for erasing data of a non-volatile semiconductor memory integrated circuit
Assignee: Texas Instruments Inc
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Filing: 1980-11-17
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Granted: 1983-07-12
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Expires: 2000-11-17
Abstract
Abstract A non-volatile semiconductor integrated circuit has floating poly-silicon gates on the channel regions of memory cells. The information electronically stored in said floating gates is erased by the irradiation of an X-ray with predetermined amount. The writing step prior to X-ray irradiation causes the uniform erase of entire memory cells. The circuits other than memory cells are protected by a shielding coating against the X-ray irradiation.
Inventors
- 👤 Nguyen T. Du
- 👤 Akihide Asao
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 10:29
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/10; G11C16/18
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
70 words
A method for erasing data of a floating-gate non-volatile semiconductor memory integrated circuit comprising the steps of writing data into memory cells of said memory integrated circuit by selectively charging the floating gates thereof and erasing such data by irradiating an X-ray beam at a wavelength of 0.23 to 10 A to a dosage of approximately 10 4 to 10 6 Rads to said memory cells through a plastic package.
Claim 2
Independent Claim
70 words
A method for erasing data of a floating-gate non-volatile semiconductor memory integrated circuit comprising the steps of writing data into memory cells of said memory integrated circuit by selectively charging the floating gates thereof and erasing such data by irradiating an X-ray beam at a wavelength of 0.23 to 10 A to a dosage of approximately 10 4 to 10 6 Rads to said memory cells through a plastic package.
Claim 3
Dependent Claim
44 words
A method for erasing data of a non-volatile semiconductor memory integrated circuit according to claim 1, wherein a semiconductor surface of said memory integrated circuit comprises a P-type semiconductor having a substrate resistivity of no less than 10Ω·cm at at least gate area thereof.
Claim 4
Dependent Claim
40 words
A method for erasing data of a non-volatile semiconductor memory integrated circuit according to claim 1, wherein a shielding coating for the X-ray beam is applied on a peripheral circuit other than the memory cells of said memory integrated circuit.
References Cited (Backward Citations)
US3731119A
Cited
US3833824A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-07-11 | 1987-01-10 | 1987-07-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-07-11 | 1991-01-10 | 1991-07-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-07-11 | 1995-01-10 | 1995-07-12 | $7700.00 | Window Closed / Lapsed |