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US4393419A Expired / Lapsed US ⏱️ 0.0 years remaining

Synchronizing signal detection protective circuit

Assignee: Hitachi Ltd
•
Filing: 1981-09-24
•
Granted: 1983-07-12
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Expires: 2001-09-24
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Abstract

Abstract A PCM recording reproducing apparatus transforms the audio signal into PCM data for recording the signal as a PCM signal in the television signal format on the video tape used in VTR, and transforms the PCM signal reproduced in the VTR back into the audio signal. The PCM apparatus is provided with a sync signal detection protective circuit which ensure the detection of the sync signal in the reproduced PCM signal. The sync signal detection protective circuit selectively uses two kinds of time gate signals in consideration of skew noises and so on. When skew does not occur, the signal with a short gating duration is selected, and only when skew, dropout, jitter or the likes has occurred failing to sample the sync signal, the signal with a long gating duration is selected.

Inventors

  • 👤 Takao Arai
  • 👤 Takashi Hoshino
  • 👤 Masaharu Kobayashi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 23:25
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/10527; G11B5/00; G11B5/02; G11B5/09; G11B20/12; G11B20/20; G11B27/00; G11B27/10; G11B27/19; G11B27/28; G11B27/30; G11B27/3027; H; H04; H04N; H04N5/00; H04N5/76; H04N5/91; H04N5/93; H04N5/932; G11B2220/00; G11B2220/90

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 235 words
A synchronizing signal detection protective circuit for detecting a synchronizing signal on a recording medium with information to be recorded and the synchronizing signal being consecutively recorded thereon, comprising: a first time gate circuit for generating a first time gate signal at a first predetermined time before an expected occurrence of said synchronizing signal; a second time gate circuit for generating a second time gate signal at a second predetermined time before said expected occurrence of said synchronizing signal, said second predetermined time occurring before said first predetermined time; a time gate signal switching circuit connected to said first and second time gate circuits and adapted to generate selectively one of said first time gate signal and second time gate signal; a synchronizing signal gate circuit connected to said time gate signal switching circuit and adapted to control the gating time for detecting said synchronizing signal in response to one of said first and second time gate signals; a compensatory synchronizing signal generating circuit for generating a compensatory synchronizing signal; and a synchronizing signal switching circuit which conducts the synchronizing signal when said synchronizing signal has been detected by said synchronizing signal gate circuit in response to either one of said first and second time gate signals, and conducts said compensatory synchronizing signal when the synchronizing signal has not been detected by said synchronizing signal gate circuit in response to said first time gate signal.
Claim 2
Dependent Claim 235 words
A synchronizing signal detection protective circuit for detecting a synchronizing signal on a recording medium with information to be recorded and the synchronizing signal being consecutively recorded thereon, comprising: a first time gate circuit for generating a first time gate signal at a first predetermined time before an expected occurrence of said synchronizing signal; a second time gate circuit for generating a second time gate signal at a second predetermined time before said expected occurrence of said synchronizing signal, said second predetermined time occurring before said first predetermined time; a time gate signal switching circuit connected to said first and second time gate circuits and adapted to generate selectively one of said first time gate signal and second time gate signal; a synchronizing signal gate circuit connected to said time gate signal switching circuit and adapted to control the gating time for detecting said synchronizing signal in response to one of said first and second time gate signals; a compensatory synchronizing signal generating circuit for generating a compensatory synchronizing signal; and a synchronizing signal switching circuit which conducts the synchronizing signal when said synchronizing signal has been detected by said synchronizing signal gate circuit in response to either one of said first and second time gate signals, and conducts said compensatory synchronizing signal when the synchronizing signal has not been detected by said synchronizing signal gate circuit in response to said first time gate signal.
Claim 3
Dependent Claim 55 words
A synchronizing signal detection protective circuit according to claim 1, wherein said first time gate signal has a predetermined time gate duration determined by the synchronizing signal when it is detected by said gate circuit and has a predetermined maximum time gate duration only when said synchronizing signal is not detected by said gate circuit.
Claim 4
Dependent Claim 43 words
A synchronizing signal detection protective circuit according to claim 1, wherein said second time gate signal has a time gate duration which is determined by either one of the synchronizing signal and said compensatory synchronizing signal conducted through said synchronizing signal switching circuit.
Claim 5
Dependent Claim 47 words
A synchronizing signal detection protective circuit according to claim 1, wherein said time gate signal switching circuit takes precedence in selecting said first time gate signal, and selects said second time gate signal when said synchronizing signal has not been detected by said synchronizing signal gate circuit.
Claim 6
Dependent Claim 40 words
A synchronizing signal detection protective circuit according to claim 1, wherein said compensatory synchronizing signal generating circuit comprises a delay circuit which delays said synchronizing signal detected by said synchronizing signal gate circuit by one period of said synchronizing signal.

References Cited (Backward Citations)

US3767849A Cited
US4024571A Cited
US4313136A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-07-11 1987-01-10 1987-07-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-07-11 1991-01-10 1991-07-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-07-11 1995-01-10 1995-07-12 $7700.00 Window Closed / Lapsed

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