US4393369A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Floating-point A/D and D/A converter
Assignee: United States Department of the Navy
•
Filing: 1981-03-16
•
Granted: 1983-07-12
•
Expires: 2001-03-16
Abstract
Abstract This improves the digitizing of analog signals over a wide dynamic range for a floating point decimal conversion. The widely fluctuating input analog voltages are converted to currents to prevent saturation of circuit elements and are, first, compared with a derived reference signal to produce positive voltages or negative voltages if the input signal exceeds or is less than the derived reference current. The positive and negative voltages are fed to a combined floating point processing unit and microprocessor which generates two groups of digital signals. The first group is representative of m mantissa increments and the second group of n signals is indicative of the order of magnitude of the mantissa components. A mantissa digital-to-analog current generator and an order of magnitude digital-to-analog current generator are coupled in series with respect to each other to provide the derived reference current which is to be compared with the next sample of the input analog signal. Since the derived reference current is derived in the immediately preceding sample period, the newly sampled analog signal is compared as being greater or lesser with a still newer input sample. The first group of digital signals indicative of the mantissa increments and the second group of digital signals indicative of the order of magnitude are fed onto following circuitry to allow for example, a visual readout or further processing. The floating point analog-to-digital conversion has the great advantage over linear, analog arithmetic conversion by being able to handle large dynamic ranges of analog input signals.
Inventors
- 👤 Kirk E. Davies
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 09:33
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/48; H03M1/14; H03M1/16; H03M1/66; H03M1/68
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
396 words
An apparatus for producing digital signals indicative of a floating decimal point representation of widely ranging input analog signals in a delta modulation servo loop comprising: a serially connected resistor coupled to receive the input analog signals for assuring that the input analog signal is an input analog current signal; an operational amplifier having a resistive feedback loop to produce a positive voltage and negative voltage coupled to the serially connected resistor for comparing the analog current signal with a derived reference signal to produce the negative voltage if the analog current signal exceeds the derived reference siangl and the positive voltage if the analog current signal is less than the derived reference signal, the derived reference current is subtracted from the input signal current therefore resulting in small currents and voltages for the system to operate on; an inverter circuit coupled to the operational amplifier for generating a logic signal representative of a positive voltage and a logic signal representative of a negative voltage; an interconnected floating point processing unit and microprocessor coupled to the inverter circuit for providing a first group of digital signals indicative of the mantissa and a second group of digital signals indicative of the order of magnitude; a first high speed multiplying digital-to-analog converter coupled to a reference potential source and coupled to the providing means for converting the first group of mantissa digital signals to a mantissa component of the derived reference signal; a second high speed multiplying digital-to-analog converter coupled to a reference potential source and coupled to the interconnected floating point processing unit and microprocessor for converting the second group of order of magnitude digital signals to an order of magnitude component of the derived reference signal; means coupled to the first and second high speed multiplying digital-to-analog converters for multiplying the mantissa component and the order of magnitude component into the derived reference signal and for feeding the derived reference signal and input analog current signal to the comparing means; means coupled to receive the first and second groups of digital signals for passing them to user components; means for feeding in a current signal to the operational amplifier when the widely ranging input analog signals are current signals; and means for amplifying and inverting the derived reference current coupled between the outputs of the first and second high speed multiplying digital-to-analog converters and operational amplifier.
Claim 2
Independent Claim
396 words
An apparatus for producing digital signals indicative of a floating decimal point representation of widely ranging input analog signals in a delta modulation servo loop comprising: a serially connected resistor coupled to receive the input analog signals for assuring that the input analog signal is an input analog current signal; an operational amplifier having a resistive feedback loop to produce a positive voltage and negative voltage coupled to the serially connected resistor for comparing the analog current signal with a derived reference signal to produce the negative voltage if the analog current signal exceeds the derived reference siangl and the positive voltage if the analog current signal is less than the derived reference signal, the derived reference current is subtracted from the input signal current therefore resulting in small currents and voltages for the system to operate on; an inverter circuit coupled to the operational amplifier for generating a logic signal representative of a positive voltage and a logic signal representative of a negative voltage; an interconnected floating point processing unit and microprocessor coupled to the inverter circuit for providing a first group of digital signals indicative of the mantissa and a second group of digital signals indicative of the order of magnitude; a first high speed multiplying digital-to-analog converter coupled to a reference potential source and coupled to the providing means for converting the first group of mantissa digital signals to a mantissa component of the derived reference signal; a second high speed multiplying digital-to-analog converter coupled to a reference potential source and coupled to the interconnected floating point processing unit and microprocessor for converting the second group of order of magnitude digital signals to an order of magnitude component of the derived reference signal; means coupled to the first and second high speed multiplying digital-to-analog converters for multiplying the mantissa component and the order of magnitude component into the derived reference signal and for feeding the derived reference signal and input analog current signal to the comparing means; means coupled to receive the first and second groups of digital signals for passing them to user components; means for feeding in a current signal to the operational amplifier when the widely ranging input analog signals are current signals; and means for amplifying and inverting the derived reference current coupled between the outputs of the first and second high speed multiplying digital-to-analog converters and operational amplifier.
Claim 3
Independent Claim
440 words
An apparatus for producing digital signals indicative of a floating decimal point representation of widely ranging input analog signals in a delta modulation servo loop comprising: a serially connected resistor coupled to receive the input analog signals for assuring that the input analog signal is an input analog current signal; an operational amplifier having a resistive feedback loop to produce a positive voltage and negative voltage coupled to the serially connected resistor for comparing the analog current signal with a derived reference signal to produce the negative voltage if the analog current signal exceeds the derived reference signal and the positive voltage if the analog current signal is less than the derived reference signal, the derived reference current is subtracted from the input signal current therefore resulting in small currents and voltages for the system to operate on; an inverter circuit coupled to the operational amplifier for generating a logic signal representative of a positive voltage and a logic signal representative of a negative voltage; an interconnected floating point processing unit and microprocessor coupled to the inverter circuit for providing a first group of digital signals indicative of the mantissa and a second group of digital signals indicative of the order of magnitude; a first high speed multiplying digital-to-analog converter coupled to a reference potential source and coupled to the interconnected floating point processing unit and microprocessor for converting the first group of mantissa digital signals to a mantissa component of the derived reference signal; a second high speed multiplying digital-to-analog converter coupled to a reference potential source and coupled to the interconnected floating point processing unit and microprocessor for converting the second group of order of magnitude digital signals to an order of magnitude component of the derived reference signal, the first high speed multiplying digital-to-analog converter is coupled to receive the voltage signals derived from the second high speed multiplying digital-to-analog converter and the second high speed multiplying digital-to-analog converter is coupled to a reference source of voltage; means coupled to the first and second high speed multiplying digital-to-analog converters for multiplying the mantissa component and the order of magnitude component into the derived reference signal and for feeding the derived reference signal and input analog current signal to the comparing means; means coupled to receive the first and second groups of digital signals for passing them to user components; means for feeding in a current signal to the operational amplifier when the widely ranging input analog signals are current signals; and means for amplifying and inverting the derived reference current coupled between the outputs of the first and second high speed multiplying digital-to-analog converters and operational amplifier.
Claim 4
Independent Claim
440 words
An apparatus for producing digital signals indicative of a floating decimal point representation of widely ranging input analog signals in a delta modulation servo loop comprising: a serially connected resistor coupled to receive the input analog signals for assuring that the input analog signal is an input analog current signal; an operational amplifier having a resistive feedback loop to produce a positive voltage and negative voltage coupled to the serially connected resistor for comparing the analog current signal with a derived reference signal to produce the negative voltage if the analog current signal exceeds the derived reference signal and the positive voltage if the analog current signal is less than the derived reference signal, the derived reference current is subtracted from the input signal current therefore resulting in small currents and voltages for the system to operate on; an inverter circuit coupled to the operational amplifier for generating a logic signal representative of a positive voltage and a logic signal representative of a negative voltage; an interconnected floating point processing unit and microprocessor coupled to the inverter circuit for providing a first group of digital signals indicative of the mantissa and a second group of digital signals indicative of the order of magnitude; a first high speed multiplying digital-to-analog converter coupled to a reference potential source and coupled to the interconnected floating point processing unit and microprocessor for converting the first group of mantissa digital signals to a mantissa component of the derived reference signal; a second high speed multiplying digital-to-analog converter coupled to a reference potential source and coupled to the interconnected floating point processing unit and microprocessor for converting the second group of order of magnitude digital signals to an order of magnitude component of the derived reference signal, the first high speed multiplying digital-to-analog converter is coupled to receive the voltage signals derived from the second high speed multiplying digital-to-analog converter and the second high speed multiplying digital-to-analog converter is coupled to a reference source of voltage; means coupled to the first and second high speed multiplying digital-to-analog converters for multiplying the mantissa component and the order of magnitude component into the derived reference signal and for feeding the derived reference signal and input analog current signal to the comparing means; means coupled to receive the first and second groups of digital signals for passing them to user components; means for feeding in a current signal to the operational amplifier when the widely ranging input analog signals are current signals; and means for amplifying and inverting the derived reference current coupled between the outputs of the first and second high speed multiplying digital-to-analog converters and operational amplifier.
References Cited (Backward Citations)
US3673398A
Cited
US4240070A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-07-11 | 1987-01-10 | 1987-07-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-07-11 | 1991-01-10 | 1991-07-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-07-11 | 1995-01-10 | 1995-07-12 | $7700.00 | Window Closed / Lapsed |