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US4390852A Expired / Lapsed US ⏱️ 0.0 years remaining

Buffer amplifier

Assignee: Tektronix Inc
•
Filing: 1981-04-13
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Granted: 1983-06-28
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Expires: 2001-04-13
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Abstract

Abstract A buffer amplifier suitable for use as an input amplifier for an oscilloscope comprises a hybrid FET-bipolar transistor source follower input stage and a complementary emitter follower output stage. Both the input and output stages include bootstraps to eliminate thermal transient response aberrations, to increase input impedance, and to maintain standing current in the output stage. Other attributes include a very short response time for high bandwidth operation, and high linearity.

Inventors

  • 👤 John L. Addis

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 06:01
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/50; H03F3/505; H03F1/00; H03F1/30; H03F1/307; H03F1/309; H03F3/30; H03F3/3069; H03F3/3076

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 108 words
A buffer amplifier, comprising: a source followr input stage comprising a field-effect transistor having a gate connectable to a signal source; a complementary emitter follower output stage comprising an emitter-coupled pair of transistors wherein the bases thereof are coupled to the source of said field-effect transistor; bias means for providing a substantially constant bias current for said emitter-coupled pair of transistors, said bias means including first means for bootstrapping the emitters of said emitter-coupled pair of transistors; and second means for bootstrapping the drain of said field-effect transistor, wherein both of said first and second bootstrapping means are driven by the output of said source follower input stage.
Claim 2
Dependent Claim 108 words
A buffer amplifier, comprising: a source followr input stage comprising a field-effect transistor having a gate connectable to a signal source; a complementary emitter follower output stage comprising an emitter-coupled pair of transistors wherein the bases thereof are coupled to the source of said field-effect transistor; bias means for providing a substantially constant bias current for said emitter-coupled pair of transistors, said bias means including first means for bootstrapping the emitters of said emitter-coupled pair of transistors; and second means for bootstrapping the drain of said field-effect transistor, wherein both of said first and second bootstrapping means are driven by the output of said source follower input stage.
Claim 3
Dependent Claim 49 words
An amplifier in accordance with claim 1 wherein said input stage further comprises a transistor, the collector of which is coupled to the source of said field-effect transistor, the base of which is connected to a bias voltage, and the emitter of which is coupled to a current source.
Claim 4
Dependent Claim 48 words
An amplifier in accordance with claim 1 wherein said bias means comprises a plurality of voltage-dropping elements serially disposed between a source of positive supply voltage and a source of negative supply voltage including at least a pair of diodes connected between the bases of said emitter-coupled transistors.
Claim 5
Dependent Claim 19 words
An amplifier in accordance with claim 1 wherein said first bootstrapping means comprises a pair of constant voltage elements.
Claim 6
Dependent Claim 39 words
An amplifier in accordance with claim 1 wherein said second bootstrapping means comprises a transistor, the base of which is coupled to said bias means and the emitter of which is coupled to the drain of said field-effect transistor.

References Cited (Backward Citations)

US3562656A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-06-27 1986-12-27 1987-06-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-06-27 1990-12-27 1991-06-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-06-27 1994-12-27 1995-06-28 $7700.00 Window Closed / Lapsed

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