US4390851A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Monolithic microwave amplifier having active impedance matching
Assignee: Boeing North American Inc
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Filing: 1980-11-25
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Granted: 1983-06-28
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Expires: 2000-11-25
Abstract
Abstract A monolithic microwave amplifier fabricated on a GaAs substrate utilizes MESFETs to provide both gain and impedance matching. The source of a first MESFET is connected to an input terminal of the amplifier and its drain is connected to an interstage matching network. The gate of a second MESFET is connected to the output of the interstage matching network and its source is connected to the output terminal of the amplifier. Suitable voltages are applied to the MESFETs to bias the devices appropriately. The gate of the first MESFET and the drain of the second MESFET are connected in common with the grounds of the amplifier's input and output ports. In a second embodiment, additional gain is obtained by providing a third MESFET with a common source connection between the first and second MESFETs.
Inventors
- 👤 J. Aiden Higgins
- 👤 Aditya K. Gupta
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 18:34
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/189; H03F3/19; H03F3/193; H03F3/1935; H03F1/00; H03F1/56
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
157 words
A monolithic microwave amplifier comprising: an input port having a signal input terminal and an input ground terminal; an output port having a signal output terminal and an output ground terminal; a first field effect transistor having a source coupled to said signal input terminal, a gate, and a drain which is positively biased with respect to said source of said first field effect transistor; an interstage matching network having its input end connected to said drain of said first field effect transistor; a second field effect transistor having a gate connected to the output end of said interstage matching circuit, a source coupled to said signal output terminal, and a drain which is positively biased with respect to said source of said second field effect transistor; said input ground terminal, said gate of said first field effect transistor, said drain of said second field effect transistor and said output ground terminal, all being connected in common.
Claim 2
Dependent Claim
157 words
A monolithic microwave amplifier comprising: an input port having a signal input terminal and an input ground terminal; an output port having a signal output terminal and an output ground terminal; a first field effect transistor having a source coupled to said signal input terminal, a gate, and a drain which is positively biased with respect to said source of said first field effect transistor; an interstage matching network having its input end connected to said drain of said first field effect transistor; a second field effect transistor having a gate connected to the output end of said interstage matching circuit, a source coupled to said signal output terminal, and a drain which is positively biased with respect to said source of said second field effect transistor; said input ground terminal, said gate of said first field effect transistor, said drain of said second field effect transistor and said output ground terminal, all being connected in common.
Claim 3
Dependent Claim
27 words
The amplifier as claimed in claim 1, wherein said first and second field effect transistors and said interstage matching networks are circuits on a monolithic GaAs substrate.
Claim 4
Dependent Claim
25 words
The amplifier as claimed in claim 1, wherein said first and second field effect transistors have gates that are 1 μm or less in length.
Claim 5
Dependent Claim
20 words
The amplifier as claimed in claim 1, wherein said interstage matching network has an impedance of at least 200 ohms.
Claim 6
Dependent Claim
224 words
A monolithic microwave amplifier comprising: an input port having a signal input terminal and an input ground terminal; an output port having a signal output terminal and an output ground terminal; a first field effect transistor having a source coupled to said signal input terminal, a gate, and a drain which is positively biased with respect to said source of said first field effect transistor; a first interdevice matching network having its input end connected to said drain of said first field effect transistor; a second field effect transistor having a gate connected to the output end of said first interstage network, a source, and a drain which is positively biased with respect to said source of said second field effect transistor; a second interstage matching network having its input end connected to said drain of said second field effect transistor; a third field effect transistor having a gate connected to the output end of said second interstage matching network, a source coupled to said signal output terminal, and a drain which is positively biased with respect to said source of said third field effect transistor; said input ground terminal, said gate of said first field effect transistor, said source of said second field effect transistor, said drain of said third field effect transistor, and said output ground terminal all being connected in common.
Claim 7
Dependent Claim
224 words
A monolithic microwave amplifier comprising: an input port having a signal input terminal and an input ground terminal; an output port having a signal output terminal and an output ground terminal; a first field effect transistor having a source coupled to said signal input terminal, a gate, and a drain which is positively biased with respect to said source of said first field effect transistor; a first interdevice matching network having its input end connected to said drain of said first field effect transistor; a second field effect transistor having a gate connected to the output end of said first interstage network, a source, and a drain which is positively biased with respect to said source of said second field effect transistor; a second interstage matching network having its input end connected to said drain of said second field effect transistor; a third field effect transistor having a gate connected to the output end of said second interstage matching network, a source coupled to said signal output terminal, and a drain which is positively biased with respect to said source of said third field effect transistor; said input ground terminal, said gate of said first field effect transistor, said source of said second field effect transistor, said drain of said third field effect transistor, and said output ground terminal all being connected in common.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-06-27 | 1986-12-27 | 1987-06-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-06-27 | 1990-12-27 | 1991-06-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-06-27 | 1994-12-27 | 1995-06-28 | $7700.00 | Window Closed / Lapsed |