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US4390849A Expired / Lapsed US ⏱️ 0.0 years remaining

Audio power amplifier with class-D push-pull output stage

Assignee: ITT Inc
•
Filing: 1981-04-28
•
Granted: 1983-06-28
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Expires: 2001-04-28
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Abstract

Abstract An audio power amplifier with class-D push pull output stage is disclosed using a "mixture" of pulse-width modulation and pulse-amplitude modulation and driving the class-D push pull output stage with the resulting combination signal. To do this, the digital output signal of the analog-to-digital converter in the input stage is split up in such a way that only its high-order bits control the pulse-width modulator, while the other low-order bitsare changed into the aforementioned pulse-amplitude-modulated signal by means of an analog-to-digital converter.

Inventors

  • 👤 Leslie Miskin

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 03:19
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/20; H03F3/21; H03F3/217; H03F3/2171; H03M; H03M1/00; H03M1/66; H03M1/68; H03M1/82; H03M1/822

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 284 words
Audio power amplifier with class-D push-pull output stage, characterized by the following features: the input stage is an analog-to-digital converter (AD) which provides a binary-coded output signal; the low-order bits (LB) of the output signal of the analog-to-digital converter (AD) are applied to the input of a digital-to-analog converter (DA), and the other, high-order digits (HB) are applied to the input of a pulse-width modulator (PM); the output signal (P) of the pulse-width modulator (PM) is applied to a pulse amplifier (IV) whose gain is adjusted by a control signal from a gated control stage (RS) in such a way that the amplitude of the output signal (V) of the pulse amplifier (IV) is equal to the maximum amplitude of the output signal (D) of the digital-to-analog converter (DA); via an electronic changeover switch (ES), the output signal (D) of the digital-to-analog converter (DA) is added to the output signal (V) of the pulse amplifier (IV) between every two of the output pulses of the pulse amplifier (IV); this combination signal (K) and the signal inverse thereto each control one of the two halves (T1, T3; T2, T4) of the class-D push-pull output stage, each of which contains a VMOS or DMOS transistor (T1, T2) operated in constant-current mode outside the saturation region, and the control signal for the gain of the pulse amplifier (IV) and the reference voltage of the digital-to-analog converter (DA) are generated by the control stage (RS), which is gated by the output signal of the pulse-width modulator (PM) and compares the drain-source voltages of the series-connected VMOS or DMOS transistors (T1, T2) with a voltage reference (U r ) so that these transistors are operated outside their saturation region.
Claim 2
Dependent Claim 284 words
Audio power amplifier with class-D push-pull output stage, characterized by the following features: the input stage is an analog-to-digital converter (AD) which provides a binary-coded output signal; the low-order bits (LB) of the output signal of the analog-to-digital converter (AD) are applied to the input of a digital-to-analog converter (DA), and the other, high-order digits (HB) are applied to the input of a pulse-width modulator (PM); the output signal (P) of the pulse-width modulator (PM) is applied to a pulse amplifier (IV) whose gain is adjusted by a control signal from a gated control stage (RS) in such a way that the amplitude of the output signal (V) of the pulse amplifier (IV) is equal to the maximum amplitude of the output signal (D) of the digital-to-analog converter (DA); via an electronic changeover switch (ES), the output signal (D) of the digital-to-analog converter (DA) is added to the output signal (V) of the pulse amplifier (IV) between every two of the output pulses of the pulse amplifier (IV); this combination signal (K) and the signal inverse thereto each control one of the two halves (T1, T3; T2, T4) of the class-D push-pull output stage, each of which contains a VMOS or DMOS transistor (T1, T2) operated in constant-current mode outside the saturation region, and the control signal for the gain of the pulse amplifier (IV) and the reference voltage of the digital-to-analog converter (DA) are generated by the control stage (RS), which is gated by the output signal of the pulse-width modulator (PM) and compares the drain-source voltages of the series-connected VMOS or DMOS transistors (T1, T2) with a voltage reference (U r ) so that these transistors are operated outside their saturation region.

References Cited (Backward Citations)

US4346349A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-06-27 1986-12-27 1987-06-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-06-27 1990-12-27 1991-06-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-06-27 1994-12-27 1995-06-28 $7700.00 Window Closed / Lapsed

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