Television receiver high voltage protection circuit

Claim 2

A disabling circuit for a television display that includes a high voltage generator to develop a picture tube ultor voltage, comprising: an inductive-capacitive resonant network; means coupled to said inductive-capacitive resonant circuit for exciting said resonant network into sustained oscillation to develop and alternating output signal; a high voltage generator responsive to said alternating output signal for developing a picture tube ultor voltage; means for developing a signal representative of said ultor voltage; means responsive to said ultor voltage representative signal for developing a disabling signal when said ultor voltage exceeds a predetermined level; and a switching element responsive to said disabling signal to a short-circuit said resonant network for stopping said sustained oscillation to disable operation of said high voltage generator.

Claim 3

A disabling circuit for a television display that includes a high voltage generator to develop a picture tube ultor voltage, comprising: an inductive-capacitive resonant network; means coupled to said inductive-capacitive resonant circuit for exciting said resonant network into sustained oscillation to develop an alternating output signal; a high voltage generator responsive to said alternating output signal for developing a picture tube ultor voltage; means for developing a signal representative of said ultor voltage; means responsive to said ultor voltage representative signal for developing a disabling signal when said ultor voltage exceeds a predetermined level; and a diode arrangement coupled across the inductive portion of said network and energized only during the development of said disabling signal for stopping said sustained oscillation to disable operation of said high voltage generator.

Claim 4

A disabling circuit for a television display that includes a high voltage generator to develop a picture tube ultor voltage, comprising: an inductive-capacitive resonant network; means coupled to said inductive-capacitive resonant circuit for exciting said resonant network into sustained oscillation to develop an alternating output signal; a high voltage generator responsive to said alternating output signal for developing a picture tube ultor voltage; means for developing a signal representative of said ultor voltage; means responsive to said ultor voltage representative signal for developing a disabling signal when said ultor voltage exceeds a predetermined level; and a diode arrangement coupled across the inductive portion of said network and energized only during the development of said disabling signal for stopping said sustained oscillation to disable operation of said high voltage generator.

Claim 5

A circuit according to claim 2 wherein said inductive-capacitive network comprises a parallel LC resonant tank circuit.

Claim 6

A circuit according to claim 2 wherein said disabling signal developing means comprises a latch coupled to said diode arrangement and activated by said ultor voltage representative signal.

Claim 7

A circuit according to claim 4 wherein said diode arrangement comprises first and second diodes having like functioning electrodes coupled together at a junction, an output terminal of said latch being coupled to said junction.

Claim 8

A circuit according to claim 5 wherein latch current flows from said first and second diodes to said junction.

Claim 9

A circuit according to claims 1, 2 or 5 wherein said high voltage generator comprises means responsive to said alternating output signal for developing a horizontal rate switching signal, a horizontal deflection winding, a trace switch coupled to said deflection winding and responsive to said horizontal rate switching signal for generating scanning current in said deflection winding, means for developing a retrace pulse voltage across said deflection winding when said trace switch becomes cut off, and means responsive to said retrace pulse voltage for developing said ultor voltage.

Claim 10

A circuit according to claim 7 wherein said trace switch comprises a horizontal output transistor responsive to said horizontal rate switching signal and a damper diode and wherein said horizontal rate switching signal developing means includes a one-shot pulse generator enabled by said alternating output signal to develop the horizontal output transistor on-drive portion of said horizontal rate switching signal when said one-shot pulse generator is enabled.

Claim 11

A disabling circuit for a television display that includes a high voltage generator that develops a picture tube ultor voltage, comprising: a reactive resonant network; means coupled to said resonant network for regeneratively developing an alternating signal across said resonant network; a high voltage generator responsive to said alternating signal for developing a picture tube ultor voltage; means for developing a signal representative of abnormal high voltage generator operation; means responsive to said abnormal operation representative signal for developing a disabling signal; and a switching element coupled to said resonant network and activated by said disabling signal to switch conductive states to generate a substantially direct current in the inductive portion of said resonant network for discontinuing the development of said alternating signal.

Claim 12

A disabling circuit for a television display that includes a high voltage generator that develops a picture tube ultor voltage, comprising: a reactive resonant network; means coupled to said resonant network for regeneratively developing an alternating signal across said resonant network; a high voltage generator responsive to said alternating signal for developing a picture tube ultor voltage; means for developing a signal representative of abnormal high voltage generator operation; means responsive to said abnormal operation representative signal for developing a disabling signal; and a switching element coupled to said resonant network and activated by said disabling signal to switch conductive states to generate a substantially direct current in the inductive portion of said resonant network for discontinuing the development of said alternating signal.

Claim 13

An LC oscillator shutdown circuit, comprising: an LC resonant network; means for exciting said resonant network into oscillation to develop a resonant network output voltage, said exciting means including means coupled to said resonant network for forming a regenerative feedback loop, the gain of said feedback loop high enough to sustain oscillation of said resonant network; and means responsive to a shutdown signal for coupling a semiconductor element across said resonant network, the low impedance of said semiconductor element lowering the gain of said feedback loop sufficiently to stop said sustained oscillation.

Claim 14

An LC oscillator shutdown circuit, comprising: an LC resonant network; means for exciting said resonant network into oscillation to develop a resonant network output voltage, said exciting means including means coupled to said resonant network for forming a regenerative feedback loop, the gain of said feedback loop high enough to sustain oscillation of said resonant network; and means responsive to a shutdown signal for coupling a semiconductor element across said resonant network, the low impedance of said semiconductor element lowering the gain of said feedback loop sufficiently to stop said sustained oscillation.

Claim 15

A shutdown circuit according to claim 10 wherein said semiconductor element comprises first and second diodes coupled in series across said resonant network, and wherein said coupling means comprises means for simultaneously forward biasing said first and second diodes into conduction.

Claim 16

A shutdown circuit according to claim 11 wherein said resonant network includes an inductor coupled to a source of DC supply voltage and wherein said diode forward biasing means comprises switching means activated by said shutdown signal to generate in said inductor a substantially DC current that is obtained from said DC supply voltage source.

Claim 17

A shutdown circuit according to claim 12 wherein said resonant network output voltage is applied to a high voltage generator of a television display to generate an ultor voltage, said shutdown circuit including means responsive to said ultor voltage for developing said shutdown signal when said ultor voltage exceeds a predetermined level.

Claim 18

An LC oscillator shutdown circuit comprising: an LC resonant network; means for exciting said resonant network into oscillation to develop a resonant network output voltage, said exciting means including a differential amplifier having an output terminal coupled to said resonant network and means for applying said resonant network output voltage to an input terminal of said differential amplifier for forming a regenerative feedback loop, the gain of said feedback loop high enough to sustain oscillation of said resonant network; and means responsive to a shutdown signal for coupling a semiconductor element across said resonant network, the low impedance of said semiconductor element lowering the gain of said feedback loop sufficiently to stop said sustained oscillation.

Claim 19

An LC oscillator shutdown circuit comprising: an LC resonant network; means for exciting said resonant network into oscillation to develop a resonant network output voltage, said exciting means including a differential amplifier having an output terminal coupled to said resonant network and means for applying said resonant network output voltage to an input terminal of said differential amplifier for forming a regenerative feedback loop, the gain of said feedback loop high enough to sustain oscillation of said resonant network; and means responsive to a shutdown signal for coupling a semiconductor element across said resonant network, the low impedance of said semiconductor element lowering the gain of said feedback loop sufficiently to stop said sustained oscillation.

Claim 20

A television receiver horizontal deflection shutdown circuit permitting completion of the forward biasing interval of the horizontal output transistor if said protection circuit is first activated within said interval due to abnormal deflection circuit operation, comprising: a horizontal deflection winding; a trace switch coupled to said horizontal deflection winding, said trace switch including a horizontal output transistor; a horizontal oscillator for developing a horizontal rate bilevel signal; a one-shot responsive to only one of the positive and negative-going transitions of said bilevel signal for developing during each cycle of said bilevel signal a drive pulse voltage having a pulse duration that is independent of the recurrence of said one transition within said drive pulse voltage interval; means for applying said drive pulse voltage to the base of said horizontal output transistor to forward bias said horizontal output transistor for the duration of said drive pulse voltage, a reverse biasing voltage for said horizontal output transistor being developed during normal deflection circuit operation in the absence of said drive pulse voltage, wherein the switching action of said horizontal output transistor produces horizontal scanning current; and shutdown means coupled to said horizontal oscillator and activated by abnormal deflection circuit operation for removing said bilevel signal to maintain said horizontal output transistor in a cut off state without prematurely terminating said drive pulse voltage when said shutdown means is activated prior to completion of said drive pulse voltage interval.

Claim 21

A television receiver horizontal deflection shutdown circuit permitting completion of the forward biasing interval of the horizontal output transistor if said protection circuit is first activated within said interval due to abnormal deflection circuit operation, comprising: a horizontal deflection winding; a trace switch coupled to said horizontal deflection winding, said trace switch including a horizontal output transistor; a horizontal oscillator for developing a horizontal rate bilevel signal; a one-shot responsive to only one of the positive and negative-going transitions of said bilevel signal for developing during each cycle of said bilevel signal a drive pulse voltage having a pulse duration that is independent of the recurrence of said one transition within said drive pulse voltage interval; means for applying said drive pulse voltage to the base of said horizontal output transistor to forward bias said horizontal output transistor for the duration of said drive pulse voltage, a reverse biasing voltage for said horizontal output transistor being developed during normal deflection circuit operation in the absence of said drive pulse voltage, wherein the switching action of said horizontal output transistor produces horizontal scanning current; and shutdown means coupled to said horizontal oscillator and activated by abnormal deflection circuit operation for removing said bilevel signal to maintain said horizontal output transistor in a cut off state without prematurely terminating said drive pulse voltage when said shutdown means is activated prior to completion of said drive pulse voltage interval.

Claim 22

A shutdown circuit according to claim 15 wherein said horizontal oscillator comprises an inductive-capacitive resonant network, means for regeneratively exciting said network into oscillation and means for developing said horizontal rate bilevel signal in response to oscillations of said network and wherein said shutdown means includes means for short-circuiting said resonant network to stop said oscillation.

Claim 23

A shutdown circuit according to claim 16 wherein said short-circuiting means comprises first and second diodes coupled in series across the inductive portion of said resonant network and means for forward biasing said two diodes upon activation of said shutdown means.

Claim 24

A shutdown circuit according to claim 17 wherein said forward biasing means comprises a latch activated by said abnormal deflection circuit operation and having an output terminal coupled to a junction terminal of said first and second diodes, latch current flowing from said two diodes into said junction terminal.

Claim 25

A shutdown circuit according to claim 18 including a resonant retrace circuit coupled to said horizontal deflection winding for generating a retrace pulse voltage in response to the switching action of said horizontal output transistor during normal deflection circuit operation and including means responsive to said retrace pulse voltage for developing an ultor voltage.