US4388694A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuitry for simultaneously performing integration and division
Assignee: Orbital Sciences LLC
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Filing: 1981-04-16
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Granted: 1983-06-14
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Expires: 2001-04-16
Abstract
Abstract The disclosed circuitry for integrating an analog voltage signal with respect to time, t, while simultaneously dividing the integral by time, t, is valuable for use in medical pulmonary analyzers and includes a ramp generator for developing a voltage level proportional to time, a duty cycle modulator for generating an inverted time signal, 1/t, a multiplier for multiplying the analog voltage signal, V, by the inverted time signal, 1/t, followed by an integrator to produce the required output of 1/t ∫V dt.
Inventors
- 👤 Robert S. Loveland
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 05:13
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/19
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
173 words
A circuitry for integrating with respect to time a signal representing an analog quantity while simultaneously dividing the integral by time, said circuitry comprising: first circuitry means responsive to a first input signal for generating an output voltage having an amplitude proportional to the time duration of said input signal; second circuitry means coupled to said first circuitry means and responsive to said output voltage for generating a cyclic output signal with high-to-low levels inversely proportional to the time duration of said first input signal; an amplifier for receiving and amplifying a voltage signal representing the analog quantity to be integrated; multiplier circuitry coupled to said amplifier and to said second circuitry means for multiplying the amplified analog voltage signal by said cyclic output signal; and integrating circuitry coupled to said multiplier circuitry for integrating the product of said analog voltage signal and said cyclic output signal to produce an output signal of 1/t∫V dt, wherein "V" is the analog voltage signal and "t" is the time duration of said first input signal.
Claim 2
Dependent Claim
173 words
A circuitry for integrating with respect to time a signal representing an analog quantity while simultaneously dividing the integral by time, said circuitry comprising: first circuitry means responsive to a first input signal for generating an output voltage having an amplitude proportional to the time duration of said input signal; second circuitry means coupled to said first circuitry means and responsive to said output voltage for generating a cyclic output signal with high-to-low levels inversely proportional to the time duration of said first input signal; an amplifier for receiving and amplifying a voltage signal representing the analog quantity to be integrated; multiplier circuitry coupled to said amplifier and to said second circuitry means for multiplying the amplified analog voltage signal by said cyclic output signal; and integrating circuitry coupled to said multiplier circuitry for integrating the product of said analog voltage signal and said cyclic output signal to produce an output signal of 1/t∫V dt, wherein "V" is the analog voltage signal and "t" is the time duration of said first input signal.
Claim 3
Dependent Claim
28 words
The circuitry claimed in claim 1 wherein said first circuitry means comprises a ramp generator, the slope of the ramp voltage output being directly proportional to time, t.
Claim 4
Dependent Claim
65 words
The circuitry claimed in claim 2 wherein said second circuitry means comprises a duty cycle modulator responsive to said ramp voltage output of said ramp generator for modulating a fixed frequency into corresponding cyclic output signals with the duration of high and low output levels determined by the level of said ramp voltage, said cyclic output signals being proportional to the inverse of time, 1/t.
Claim 5
Dependent Claim
40 words
The circuitry claimed in claim 3 wherein said duty cycle modulator includes an output switch responsive to said cyclic output of said modulator for interrupting said ramp voltage generator output to said modulator in accordance with said cyclic output signals.
Claim 6
Dependent Claim
51 words
The circuitry claimed in claim 3 wherein said multiplier circuitry comprises a switch responsive to said cyclic output signals and interposed between the output of said amplifier and the input to said integrator for interrupting said amplified analog voltage signals to said integrator at said cyclic signal representing the value, 1/t.
Claim 7
Dependent Claim
33 words
The circuitry claimed in claim 5 wherein said integrating circuitry is responsive to said first input signal for integrating the product of said multiplier over the time duration of said first input signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-06-13 | 1986-12-13 | 1987-06-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-06-13 | 1990-12-13 | 1991-06-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-06-13 | 1994-12-13 | 1995-06-14 | $7700.00 | Window Closed / Lapsed |