Gain-step companding analog to digital converter

Claim 1

A gain step companding analog-to-digital conversion system comprising: amplifying means for providing an output signal of a selected amplification of an analog input signal, said amplifying means being a variable gain step amplifier and having feedback controls for choosing said selected amplification of one of only 48 dB gain, 30 dB gain, 12 dB gain and 0 dB gain; an analog-to-digital converter having a quantized window, said converter is connected to receive the output of said amplifying means, said converter providing an 11 bit plus sign digital output signal; digital averaging means connected to said analog-to-digital converter for providing an average digital output signal of the preceding digital output signals of said converter; upper threshold detector means connected to receive said average digital output signal and for providing a first trigger signal if said received average digital output signal has a one bit in either of the two most significant bits; lower threshold detector means connected to receive said average digital output signal and for providing a second trigger signal if said received digital signal has all zero bits in the eight most significant bits; gain control logic means connected to receive said first trigger signal and said second trigger signal and for providing a predetermined output signal in response to one of said first trigger signal and said second trigger signal, said predetermined output signal providing a feedback signal to said amplifying means; and code conversion means connected to receive said analog-to-digital converter digital output signal and said gain control logic means predetermined output signal and for providing a code converted output signal of said analog-to-digital converter digital output signal, said provided code converted output signal in an eight bit plus sign digital signal representing a nineteen bit plus sign digital signal with a maximum possible error of 3.125%.