NMOS Crystal oscillator

Claim 2

An electronic oscillator of the type having a ground potential supply means, a positive potential supply means to which there are connected a basic oscillator stage coupled to a logic output stage, characterized by: a voltage comparator, followed by a voltage level shifter, coupled between said basic oscillator and said output stage, said basic oscillator stage comprising an inverter and a resonator connected in a feedback loop to said inverter and comprising also a biasing network, said biasing network including: a first, enhancement transistor with its source connected to said ground supply means and its gate connected to its drain; a second, depletion transistor with its drain connected to said positive supply means and its gate and source connected to the gate and drain of said first transistor of said biasing network; and a third, depletion transistor with its drain connected to the node of juncture of said first and second transistors, and its gate and source connected to an input node of said inverter and to one side of said resonator.

Claim 3

An electronic oscillator of the type having a ground potential supply means, a positive potential supply means to which there are connected a basic oscillator stage coupled to a logic output stage, characterized by: a voltage comparator, followed by a voltage level shifter, coupled between said basic oscillator and said output stage, said comparator comprising first and second transistors connected as a differential pair and a third transistor serving as a current source for said differential pair; said first differential pair transistor having its gate connected to the drain of a transconductance transistor and its drain connected to the source of an enhancement mode transistor which has its gate and drain connected to said positive supply means, said transconductance transistor having its source connected to said ground supply means; said second differential pair transistor having its drain connected to the gate and the source of a depletion mode transistor, which in turn has its drain connected to said positive supply means; the sources of said first and second differential pair transistors being connected to the drain of said third, differential pair current source transistor, and the source of said third, differential pair current source transistor being connected to said negative supply means, the gates of said second differential pair transistor and said third, differential pair current source transistor being coupled to the drain of said first differential pair transistor.

Claim 4

An electronic oscillator of the type having a ground potential supply means, a positive potential supply means to which there are connected a basic oscillator stage coupled to a logic output stage, characterized by: a voltage comparator, followed by a voltage level shifter, coupled between said basic oscillator and said output stage, said comparator comprising first and second transistors connected as a differential pair and a third transistor serving as a current source for said differential pair; said first differential pair transistor having its gate connected to the drain of a transconductance transistor and its drain connected to the source of an enhancement mode transistor which has its gate and drain connected to said positive supply means, said transconductance transistor having its source connected to said ground supply means; said second differential pair transistor having its drain connected to the gate and the source of a depletion mode transistor, which in turn has its drain connected to said positive supply means; the sources of said first and second differential pair transistors being connected to the drain of said third, differential pair current source transistor, and the source of said third, differential pair current source transistor being connected to said negative supply means, the gates of said second differential pair transistor and said third, differential pair current source transistor being coupled to the drain of said first differential pair transistor.

Claim 5

The apparatus defined in claim 2 wherein said basic oscillator stage (16) comprises a crystal resonator (34) connected within a feedback loop configuration to an inverter.

Claim 6

The apparatus defined in claim 3 wherein said basic oscillator stage comprises an inverter having a biasing network which comprises first, second and third biasing network transistors; said second biasing network transistor being a depletion transistor with its drain connected to said positive supply means; said first biasing network transistor being an enhancement transistor with its source connected to said ground supply means, its gate connected to its drain, and its gate also connected to the gate and source of said second biasing network transistor; and, said third biasing network transistor having its drain connected to the source of said second biasing network transistor and its gate and source connected to the gate of said transconductance transistor of said basic oscillator stage.