Abstract A serial-parallel-serial organized charge transfer memory is integrated on a semiconductor chip and includes a read-in chain consisting of first and second charge transfer elements alternately arranged behind one another, respectively controllable by way of clock pulse lines, and comprising memory and shift electrodes, and a field of parallel chains of charge transfer elements into which charges characterizing information are transferred either only from the first or only from the second charge transfer elements of the read-in chain, and a read-out chain constructed as the read-in chain and operated by way of clock pulse lines. The like electrodes of the charge transfer elements of the read-in and read-out chains, together with the appertaining control and clock pulse lines respectively consist of a continuous conduction band, at least in the area of the serial read-in and read-out chains of the chip.
In a series-parallel-series charge transfer memory integrated on a chip for four phase operation, in which series read-in and read-out chains each comprise charge transfer elements each having a memory electrode and a transfer electrode, in which corresponding electrodes of each second charge transfer element of the read-in chain and of the read-out chain has coupled thereto a group of at least two of the parallel chains, and in which the four clock pulse voltages for the read-in chain and the read-out chain are supplied via respective clock lines, the improvement wherein: the electrodes associated with a respective clock pulse voltage comprise a continuous polysilicon strip conductor; that the transfer electrodes comprise comb-shaped structures; and the four polysilicon conductors are arranged with respect to the transfer electrodes such that a tooth of the comb shaped structure assigned to a memory electrode is partially covered by two teeth belonging to different transfer electrodes on opposite sides thereof so that the required clock pulse voltages are fed to the electrodes directly by way of the polysilicon conductors.
Claim 2
Dependent Claim
175 words
In a series-parallel-series charge transfer memory integrated on a chip for four phase operation, in which series read-in and read-out chains each comprise charge transfer elements each having a memory electrode and a transfer electrode, in which corresponding electrodes of each second charge transfer element of the read-in chain and of the read-out chain has coupled thereto a group of at least two of the parallel chains, and in which the four clock pulse voltages for the read-in chain and the read-out chain are supplied via respective clock lines, the improvement wherein: the electrodes associated with a respective clock pulse voltage comprise a continuous polysilicon strip conductor; that the transfer electrodes comprise comb-shaped structures; and the four polysilicon conductors are arranged with respect to the transfer electrodes such that a tooth of the comb shaped structure assigned to a memory electrode is partially covered by two teeth belonging to different transfer electrodes on opposite sides thereof so that the required clock pulse voltages are fed to the electrodes directly by way of the polysilicon conductors.