All digital LSI line circuit for analog lines

Claim 2

A digital telephone line circuit providing an interface between a full duplex analog telephone subscriber line and a digital switching system, comprising: means for automatically digitally synthesizing an output matching transmission line terminating impedance; two-to-four wire conversion means for digitally separating full duplex transmit and receive information signals on said subscriber line into a pair of digital signals, each separate from the other; automatic recursive equalizer means coupled to said two-to-four wire conversion means for providing time multiplexed signal optimization/equalization of said information signals by time multiplexing said recursive equalizer means to said full duplex line such that automatic equalization is provided for said line in accordance with its individual transmission line characteristics during the interval that said equalizer means is coupled to said two-to-four wire conversion means and to said means for digitally synthesizing an output matching transmission line terminating impedance.

Claim 3

A digital telephone line circuit in accordance with claim 1 wherein said synthesizing means comprises: analog-to-digital conversion means for converting said full duplex transmit and receive information signals from said subscriber line to digital signals; means for summing said digital signals with additional digital communication signals providing a composite digital signal in a negative feedback loop; digital filter means having said composite digital signal coupled thereto for directly establishing a predetermined output impedance characteristic, said digital filter having alterable filter coefficients, and having a digital signal output; digital-to-analog conversion means for converting said digital signal output to a analog voltage signal; and means for converting said analog voltage signal to an analog current such that the predetermined output impedance characteristic is high compared to the matched line.

Claim 4

A digital telephone line circuit in accordance with claim 2 wherein said means for converting said analog voltage signal to an analog current comprises: transconductance amplifier means having an output impedance defined by a specific current to voltage transfer ratio g mhos.

Claim 5

A digital telephone line circuit in accordance with claim 2 wherein said predetermined output impedance characteristic of said digital filter is derived by varying alterable digital filter coefficients in accordance with a control data input.

Claim 6

A digital telephone line circuit in accordance with claim 4 wherein: said automatic equalizer includes means for deriving said control data input to adaptively vary the digital filter coefficients in a rapidly converging process to said established predetermined output impedance characteristic at final convergence.

Claim 7

A digital telephone line circuit in accordance with claim 4 wherein said digital filter is a recursive digital filter.

Claim 8

A digital telephone line circuit in accordance with claim 6 wherein said recursive digital filter includes five programmable filter coefficients.

Claim 9

A digital telephone line circuit in accordance with claim 3 wherein said subscriber line includes incidental shunting impedances between said line and said line circuit, and wherein the admittance of said line is represented by Y L , the admittance of said shunting impedances is represented by Yx and wherein said predetermined output impedance characteristic of said digital filter is controlled to equal Y L -Yx.

Claim 10

A circuit in accordance with claim 8 wherein said incidental shunting impedances include telephone battery feed and leakage impedance effects.

Claim 11

A digital telephone line circuit in accordance with claim 1 wherein said two-to-four wire conversion means comprises: coder means for converting analog transmit and receive signals to a composite digital data stream; means for deriving coefficient control data representative of the transmission characteristics of said two-wire path; first digital filter means having said transmit signal coupled thereto, and including a coefficient matrix, said transmit signal being multiplied by said coefficient matrix to adjust the digital output of said first digital filter to derive a signal representative of an undesired signal portion from said transmit signal, said coefficient matrix being derived from said coefficient control data, such that a substantially infinite signal return loss is provided between the separated transmit and receive digital signals; second digital filter means having said transmit digital signal coupled thereto, and including a variable coefficient matrix controlled by said coefficient control data for providing a synthesized impedance match to said subscriber line; decoder means for converting said transmit signal to an analog receive signal, including transconductance amplifier means having a substantially infinite output impedance; and means for combining said output from said first digital filter with said composite digital data stream to cancel the unwanted return transmit signal from said digital data stream, and having an output consisting of said receive signal.

Claim 12

A digital telephone line circuit in accordance with claim 10 wherein said multiplexing means for time sharing said automatic equalizer means over a plurality of subscriber lines includes means for storing coefficient control data representative of the individual transmission characteristics of each of said plurality of subscriber lines and further includes means for distributing said coefficient control data to the respective digital filters associated with each of said subscriber lines such that impedance matching and signal separation is maintained for each of said subscriber lines in accordance with its respective coefficient control data.

Claim 13

A digital telephone line circuit in accordance with claim 10 wherein said coder means is a sigma-delta coder.

Claim 14

A digital telephone line circuit in accordance with claim 12 wherein said coder means further includes: prefilter means for limiting the input bandwidth to said coder; and postfilter means for establishing a desired feedback gain characteristic.

Claim 15

A digital telephone line circuit in accordance with claim 13, further comprising: switching means for providing a feedback path for said composite digital data stream to said digital transmit signal, such that said digital transmit signal and said composite digital data stream are combined prior to being coupled to said first digital filter means.

Claim 16

A digital telephone line circuit in accordance with claim 10 wherein said first and second digital filter means are comprised of recursive digital filters.

Claim 17

A digital telephone line circuit in accordance with claim 15 wherein said first and second recursive digital filters each include five alterable coefficient values.

Claim 18

A digital telephone line circuit in accordance with claim 10 wherein said decoder means further comprises: prefilter means for establishing a desired decoder path gain characteristic; and postfilter means for filtering said decoder output to reduce quantizing noise.

Claim 19

A digital telephone line circuit in accordance with claim 1 wherein said automatic equalizer is configured on a single large scale integrated circuit chip time multiplexed to N line circuits and wherein each of said N line circuits are configured on an individual LSI chip, such that N LSI line circuit chips are provided for N subscriber lines.

Claim 20

A digital telephone line circuit in accordance with claim 1 wherein said automatic equalizer means comprises: means for digitally processing the input signal and said established reference to derive a digital gradient vector set of signals C l through C k ; and means responsive to said gradient vector set of digital signals for adaptively changing digital recursive filter coefficients in a rapidly converging process to directly implement a digital recursive filter function at final convergence which processes the input signal to provide an equalized/optimized output signal with respect to the established reference and input signal.