US4381498A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Analog-to-digital converting apparatus
Assignee: Verizon Laboratories Inc
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Filing: 1981-07-06
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Granted: 1983-04-26
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Expires: 2001-07-06
Abstract
Abstract Microprocessor controlled analog-to-digital converting apparatus. For each analog signal input line there is a comparator having one input connected to the associated analog signal input line. A ramp generator is connected in common to the other input of all of the comparators. A multiplexing arrangement is operated by the microprocessor to couple a selected one of the comparators to a storage register in the microprocessor. The selected comparator compares the voltage of the analog input signal to the ramp voltage. If the analog voltage is higher, the comparator output remains inactive and the microprocessor causes a count to be stored in the storage register. The ramp generator is toggled to increase the ramp voltage by a predetermined step. The comparison of the analog voltage and ramp voltage is repeated. If the comparator output remains inactive, another count is accumulated in the storage register and the ramp generator is toggled to increase its voltage by another step. The procedure continues until the ramp voltage exceeds the analog signal voltage and the comparator output becomes active. The microprocessor then causes the multiplexing arrangement to uncouple the selected comparator from the storage register. The accumulated count in the storage register is a digital representation of the analog signal voltage.
Inventors
- 👤 Thomas C. Goodale
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 06:42
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/1205; H03M1/50
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
501 words
Analog-to-digital converting apparatus including a plurality of analog signal input lines; a like plurality of comparator means each having first and second input terminals and an output terminal, and being operable to produce a first output signal at the output terminal when the voltage at the first input terminal is greater than the voltage at the second input terminal and to produce a second output signal at the output terminal when the voltage at the second input terminal is greater than the voltage at the first input terminal; each analog signal input line being connected to the first input terminal of a different one of said comparator means; ramp generator means connected to the second input terminals of all the comparator means and being operable to produce a ramp voltage which increases in predetermined steps in response to toggle signals applied thereto; a single comparator output line; a like plurality of switching means, each being operable to connect the output terminal of a different one of said comparator means to said comparator output line; multiplexing means coupled to said plurality of switching means, said multiplexing means being operable in response to select signals applied thereto to cause the switching means designated by the select signals to connect the output terminal of the associated comparator means to said comparator output line, and said multiplexing means being operable in response to de-select signals applied thereto to cause the switching means to disconnect the output terminal of the associated comparator means from said comparator output line; processing means comprising a single storage means for storing an accumulated count coupled to the comparator output line; means for applying select signals to said multiplexing means designating a selected one of said plurality of switching means whereby said multiplexing means causes the designated switching means to connect the output terminal of the associated comparator means to the comparator output line; means for resetting said ramp generator means to a starting ramp voltage; means for applying a toggle signal to said ramp generator means whereby the ramp voltage produced by the ramp generator means increases by a predetermined step; means operable in response to said first output signal from the selected comparator means subsequent to a toggle signal to cause the storage means to add a count to the accumulated count and to cause said means for applying a toggle signal to said ramp generator means to apply a toggle signal to said ramp generator means; and means operable in response to said second output signal from the selected comparator means subsequent to a toggle signal to apply de-select signals to said multiplexing means whereby said multiplexing means causes the switching means to disconnect the output terminal of the associated comparator means from the comparator output line; whereby the count accumulated in the storage means when the selected comparator means is disconnected from the comparator output line is a digital representation of the analog voltage present on the analog signal input line associated with the selected comparator means.
Claim 2
Dependent Claim
501 words
Analog-to-digital converting apparatus including a plurality of analog signal input lines; a like plurality of comparator means each having first and second input terminals and an output terminal, and being operable to produce a first output signal at the output terminal when the voltage at the first input terminal is greater than the voltage at the second input terminal and to produce a second output signal at the output terminal when the voltage at the second input terminal is greater than the voltage at the first input terminal; each analog signal input line being connected to the first input terminal of a different one of said comparator means; ramp generator means connected to the second input terminals of all the comparator means and being operable to produce a ramp voltage which increases in predetermined steps in response to toggle signals applied thereto; a single comparator output line; a like plurality of switching means, each being operable to connect the output terminal of a different one of said comparator means to said comparator output line; multiplexing means coupled to said plurality of switching means, said multiplexing means being operable in response to select signals applied thereto to cause the switching means designated by the select signals to connect the output terminal of the associated comparator means to said comparator output line, and said multiplexing means being operable in response to de-select signals applied thereto to cause the switching means to disconnect the output terminal of the associated comparator means from said comparator output line; processing means comprising a single storage means for storing an accumulated count coupled to the comparator output line; means for applying select signals to said multiplexing means designating a selected one of said plurality of switching means whereby said multiplexing means causes the designated switching means to connect the output terminal of the associated comparator means to the comparator output line; means for resetting said ramp generator means to a starting ramp voltage; means for applying a toggle signal to said ramp generator means whereby the ramp voltage produced by the ramp generator means increases by a predetermined step; means operable in response to said first output signal from the selected comparator means subsequent to a toggle signal to cause the storage means to add a count to the accumulated count and to cause said means for applying a toggle signal to said ramp generator means to apply a toggle signal to said ramp generator means; and means operable in response to said second output signal from the selected comparator means subsequent to a toggle signal to apply de-select signals to said multiplexing means whereby said multiplexing means causes the switching means to disconnect the output terminal of the associated comparator means from the comparator output line; whereby the count accumulated in the storage means when the selected comparator means is disconnected from the comparator output line is a digital representation of the analog voltage present on the analog signal input line associated with the selected comparator means.
Claim 3
Dependent Claim
36 words
Analog-to-digital converting apparatus in accordance with claim 1 wherein said processing means includes means operable in response to a predetermined maximum accumulated count in said storage means to apply said de-select signals to said multiplexing means.
References Cited (Backward Citations)
US3448446A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-04-25 | 1986-10-25 | 1987-04-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-04-25 | 1990-10-25 | 1991-04-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-04-25 | 1994-10-25 | 1995-04-26 | $7700.00 | Window Closed / Lapsed |