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US4377903A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for manufacturing an I2 L semiconductor device

Assignee: Toshiba Corp
•
Filing: 1981-02-18
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Granted: 1983-03-29
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Expires: 2001-02-18
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Abstract

Abstract An oxide layer is partially formed on an n-type region surrounded by a field oxide region. A base region of a switching transistor is formed in the n-type region using as a mask the oxide layer. Arsenic-doped polysilicon layers are selectively formed simultaneously on the surfaces of the oxide layer and the base region. Using the polysilicon layers as a mask, the emitter and collector regions of an injector transistor and the external base region of a switching transistor are formed in the n-type region and the base region respectively. Arsenic doped into the polysilicon layers is diffused into the base region, so that the collector regions of the switching transistor are self-aligned with the polysilicon layers.

Inventors

  • 👤 Koichi Kanzaki
  • 👤 Minoru Taguchi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 12:42
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0112; H10D84/0116; H10D84/02; H10D84/03; H10D84/038; H10P; H10P76/00; H10P76/40

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 254 words
A method for manufacturing a semiconductor device comprising the steps of: a. forming at least one island region of a first conductivity type surrounded by a field insulation region on a semiconductor layer of said first conductivity type; b. forming a first insulating film on a part of the surface of said first conductivity type island region; c. forming a first region of a second conductivity type in said island region not covered by said first insulating film; d. forming discrete impurity-doped polysilicon layers of said first conductivity type on the surfaces of said first insulating film and said second conductivity type first region, said polysilicon layers crossing said first insulating film and said second conductivity type first region; e. eliminating any exposed parts of said first insulating film after the formation of said polysilicon layers; f. covering said polysilicon layers with individual thick insulating films; g. forming second regions of said second conductivity type by doping an impurity of said second conductivity type into said first conductivity type island region and said second conductivity type first region using as a mask said polysilicon layers covered with said thick insulating films; h. forming third regions of said first conductivity type by diffusing said impurity doped in said polysilicon layers into portions of said first region beneath said polysilicon layers; i. connecting said second regions in said first region, which are not covered with said polysilicon layers, by a conductive layer; and j. depositing a conductive layer on said second region in said island region.
Claim 2
Independent Claim 254 words
A method for manufacturing a semiconductor device comprising the steps of: a. forming at least one island region of a first conductivity type surrounded by a field insulation region on a semiconductor layer of said first conductivity type; b. forming a first insulating film on a part of the surface of said first conductivity type island region; c. forming a first region of a second conductivity type in said island region not covered by said first insulating film; d. forming discrete impurity-doped polysilicon layers of said first conductivity type on the surfaces of said first insulating film and said second conductivity type first region, said polysilicon layers crossing said first insulating film and said second conductivity type first region; e. eliminating any exposed parts of said first insulating film after the formation of said polysilicon layers; f. covering said polysilicon layers with individual thick insulating films; g. forming second regions of said second conductivity type by doping an impurity of said second conductivity type into said first conductivity type island region and said second conductivity type first region using as a mask said polysilicon layers covered with said thick insulating films; h. forming third regions of said first conductivity type by diffusing said impurity doped in said polysilicon layers into portions of said first region beneath said polysilicon layers; i. connecting said second regions in said first region, which are not covered with said polysilicon layers, by a conductive layer; and j. depositing a conductive layer on said second region in said island region.
Claim 3
Independent Claim 236 words
A method for manufacturing a semiconductor device comprising the steps of: a. forming at least one island region of a first conductivity type surrounded by a field insulation region on a semiconductor layer of said first conductivity type; b. forming a first insulating film on a part of the surface of said first conductivity type island region; c. forming a second conductivity type internal base region of a switching transistor in said island region not covered by said first insulating film; d. forming discrete impurity-doped polysilicon layers of said first conductivity type on the surfaces of said first insulating film and said internal base region, said polysilicon layers crossing said first insulating film and said internal base region; e. eliminating any exposed parts of said first insulating film after the formation of said polysilicon layers; f. covering said polysilicon layers with individual thick insulating layers; g. forming the emitter and collector regions of an injector transistor and the external base regions of said switching transistor in said island region and said internal base region respectively using said polysilicon layers covered with said thick insulating layers as a mask, and forming collector regions of said switching transistor by diffusing said impurity doped in said polysilicon layers into portions of said internal base region beneath said polysilicon layers; h. connecting said external base regions by a conductive layer; and i. depositing a conductive layer on said emitter region.
Claim 4
Independent Claim 236 words
A method for manufacturing a semiconductor device comprising the steps of: a. forming at least one island region of a first conductivity type surrounded by a field insulation region on a semiconductor layer of said first conductivity type; b. forming a first insulating film on a part of the surface of said first conductivity type island region; c. forming a second conductivity type internal base region of a switching transistor in said island region not covered by said first insulating film; d. forming discrete impurity-doped polysilicon layers of said first conductivity type on the surfaces of said first insulating film and said internal base region, said polysilicon layers crossing said first insulating film and said internal base region; e. eliminating any exposed parts of said first insulating film after the formation of said polysilicon layers; f. covering said polysilicon layers with individual thick insulating layers; g. forming the emitter and collector regions of an injector transistor and the external base regions of said switching transistor in said island region and said internal base region respectively using said polysilicon layers covered with said thick insulating layers as a mask, and forming collector regions of said switching transistor by diffusing said impurity doped in said polysilicon layers into portions of said internal base region beneath said polysilicon layers; h. connecting said external base regions by a conductive layer; and i. depositing a conductive layer on said emitter region.
Claim 5
Dependent Claim 59 words
A method for manufacturing a semiconductor device according to claim 2, wherein the emitter and collector regions of said injector transistor and the external base regions of said switching transistor are formed by doping an impurity into said island region and said internal base region respectively using as a mask said polysilicon layers enclosed by said thick insulating films.
Claim 6
Dependent Claim 20 words
A method for manufacturing a semiconductor device according to claim 3, wherein said impurity is doped by an ion implantation.

References Cited (Backward Citations)

US4183037A Cited
US4273805A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-03-28 1986-09-27 1987-03-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-03-28 1990-09-27 1991-03-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-03-28 1994-09-27 1995-03-29 $7700.00 Window Closed / Lapsed

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