Signal compressor apparatus

Claim 1

In a charge transfer device, a charge coupled device which comprises a semiconductor substrate with an insulating material deposited thereon and a plurality of gate electrodes provided on or within said insulating material and driving means for driving said plurality of gate electrodes, the improvement comprising a signal compressor means for compressing an input signal wherein a first gate electrode means receives a first fixed bias from said driving means to provide a first potential barrier, a second gate electrode means receives a voltage waveform with a predetermined linear slope from said driving means to provide a variable charge storage well, a third gate electrode means receives a second fixed bias from said driving means to provide a second potential barrier, said second potential barrier being lower than said first potential barrier; and a pair of adjacent gate electrodes next to said third gate electrode means to receive complementary clock pulses from said driving means, one of said pair of adjacent gate electrodes being an output gate which is connected to an output register, the other of said pair of adjacent gate electrodes being a dump gate which is connected to a dump diffusion means for dumping excess charge, said signal compressor means receiving an input charge with a linear charge rate, said input charge passing over said first potential barrier and into said storage well, the excess of said input charge passing over said second potential barrier and through said dump gate electrode to said dump diffusion means during the intitial portion of the integration period, near the end of the integration period, said clock pulses to said pair of adjacent gate electrodes reverses and enables said output gate wherein any excess charge therein is combined with the charge in said storage well and applied to said output register.