Constant voltage circuit

Claim 2

A constant-voltage circuit comprising: first and second input terminals for supplying an input voltage; first and second output terminals for outputting a constant voltage; a first transistor having a base, a collector connected to the first input terminal, and an emitter connected to the first output terminal; a second transistor having a base, and collector and emitter connected between the base of the first transistor and the second input terminal; means for applying a current in response to the input voltage to a connecting point of the first and second transistors; a current mirror circuit comprising, a series circuit including at least a resistive means and a PN junction portion connected in series across the first input terminal and the first output terminal to form a first current path therebetween; a third transistor having a base connected to the interconnection between the resistive means and the PN junction portion of said first current path, and emitter and collector terminals connected between the connection point of said first and second transistors and said first output terminal to form a second current path which is also connected to the said applying means, and said PN junction portion of said first current path connected across the base and emitter of said third transistor and having a conductance substantially equal to that of the conductance of said third transistor such that the current flowing through said PN junction portion of said series circuit is substantially equal to the current flowing through said collector of said third transistor; output sensing means connected to said output terminals for applying a signal proportional to the voltage across said output terminals to the base of said second transistor, thereby stabilizing an output voltage across said first and second output terminals in relation to variation of an input voltage across said first and second input terminals.

Claim 3

A constant voltage circuit according to claim 1, further comprising: said first current path including another PN junction portion connected in series with the resistive means thereof between the first input terminal and the base of said third transistor, and said applying means comprising a resistor having a resistance equal to the resistance of said resistive means of said first current path.

Claim 4

A constant-voltage circuit according to claim 1 wherein a base of the second transistor is connected to a connecting point of two resistors connected in series between the first and second output terminals.

Claim 5

A constant-voltage circuit according to claim 1, wherein all elements of the circuit are constructed on one semiconductor chip.

Claim 6

A constant-voltage circuit comprising: first and second input terminals for supplying an input voltage; first and second output terminals for outputting a constant voltage; a first transistor having a base, a collector connected to the first input terminal, and an emitter connected to the first output terminal; a second transistor having a base, and collector and emitter connected between the base of the first transistor and the second input terminal; means for applying a current in response to the input voltage to a connecting point of the first and second transistors; a current mirror circuit comprising, a series circuit including at least a resistive means and a PN junction means connected in series across the first input terminal and the first output terminal to form a first current path therebetween; a third transistor having a base connected to the interconnection between the resistive means and the PN junction means of said first current path, and emitter and collector terminals connected between the connection point of said first and second transistors and said first output terminal to form a second current path which is also connected to the said applying means, and said PN junction means of said first current path connected across the base and emitter of said third transistor; output sensing means connected to said output terminals for applying a signal in response to the voltage across said output terminals to the base of said second transistor, whereby an output voltage across said first and second output terminals is stabilized in relation to variation of an input voltage across said first and second input terminals.

Claim 7

A constant-voltage circuit comprising: first and second input terminals for supplying an input voltage; first and second output terminals for outputting a constant voltage; a first transistor having a base, a collector connected to the first input terminal, and an emitter connected to the first output terminal; a second transistor having a base, and collector and emitter connected between the base of the first transistor and the second input terminal; means for applying a current in response to the input voltage to a connecting point of the first and second transistors; a current mirror circuit comprising, a series circuit including at least a resistive means and a PN junction means connected in series across the first input terminal and the first output terminal to form a first current path therebetween; a third transistor having a base connected to the interconnection between the resistive means and the PN junction means of said first current path, and emitter and collector terminals connected between the connection point of said first and second transistors and said first output terminal to form a second current path which is also connected to the said applying means, and said PN junction means of said first current path connected across the base and emitter of said third transistor; output sensing means connected to said output terminals for applying a signal in response to the voltage across said output terminals to the base of said second transistor, whereby an output voltage across said first and second output terminals is stabilized in relation to variation of an input voltage across said first and second input terminals.

Claim 8

A constant-voltage circuit comprising: first and second input terminals for supplying an input voltage; first and second output terminals for outputting a constant voltage; a first transistor having a base, a collector connected to the first input terminal, and an emitter connected to the first output terminal; a second transistor having a base, and collector and emitter connected between the base of the first transistor and the second input terminal; means for applying a current in response to the input voltage to a connecting point of the first and second transistors; a current mirror circuit comprising; a series circuit including at least a resistive means and a PN junction portion connected in series across the first input terminal and the first output terminal to form a first current path therebetween; a third transistor having a base connected to the interconnection between the resistive means and the PN junction portion of said first current path, and emitter and collector terminals connected between the connection point of said first and second transistors and said first output terminal to form a second current path which is also connected to the said applying means, and said PN junction portion of said first current path connected across the base and emitter of said third transistor wherein the conductance of said PN junction portion and that of said third thyristor are selected such that the current flowing through said PN junction portion of said series circuit is substantially equal to the current flowing through said collector of said third transistor; output sensing means connected to said output terminals for applying a signal proportional to the voltage across said output terminals to the base of said second transistor; whereby the collector current of said second transistor is substantially determined by a forward voltage across said PN junction portion and the resistance of laid resistive means of said first current path, thereby stabilizing an output voltage across said first and second output terminals in relation to variation of an input voltage across said first and second input terminals.

Claim 9

A constant-voltage circuit comprising: first and second input terminals for supplying an input voltage; first and second output terminals for outputting a constant voltage; a first transistor having a base, a collector connected to the first input terminal, and an emitter connected to the first output terminal; a second transistor having a base, and collector and emitter connected between the base of the first transistor and the second input terminal; means for applying a current in response to the input voltage to a connecting point of the first and second transistors; a current mirror circuit comprising; a series circuit including at least a resistive means and a PN junction portion connected in series across the first input terminal and the first output terminal to form a first current path therebetween; a third transistor having a base connected to the interconnection between the resistive means and the PN junction portion of said first current path, and emitter and collector terminals connected between the connection point of said first and second transistors and said first output terminal to form a second current path which is also connected to the said applying means, and said PN junction portion of said first current path connected across the base and emitter of said third transistor wherein the conductance of said PN junction portion and that of said third thyristor are selected such that the current flowing through said PN junction portion of said series circuit is substantially equal to the current flowing through said collector of said third transistor; output sensing means connected to said output terminals for applying a signal proportional to the voltage across said output terminals to the base of said second transistor; whereby the collector current of said second transistor is substantially determined by a forward voltage across said PN junction portion and the resistance of laid resistive means of said first current path, thereby stabilizing an output voltage across said first and second output terminals in relation to variation of an input voltage across said first and second input terminals.