Push-pull amplifier circuit

Claim 2

An amplifier comprising: (a) means for supplying an input signal to said amplifier; (b) a push-pull amplifier including first and second complementary transistors having respective output terminals connected together at a first junction, said first junction being connected to a load; (c) a DC amplifier having a non-inverting input terminal and an inverting input terminal, said means for supplying an input signal being connected to said non-inverting input terminal, said first junction being connected to said inverting input terminal; (d) a first biasing power supply circuit having first and second halves operative together to produce a predetermined first potential and a first biasing current, a first junction at first terminals of said first and second halves being connected to said first and second transistors respectively, a second junction at second terminals of said first and second halves, each of said first and second halves being operative to establish half of said first potential at said first terminals thereof, said means for supplying an input signal being connected to second junction; (e) a second biasing power supply circuit having third and fourth halves operative together to produce a predetermined second potential and a second biasing current, a third junction at first terminals of said third and fourth halves, each of said third and fourth halves being operative to establish half of said second potential at second terminals thereof, said DC amplifier having an output connected to said third junction, and; (f) means responsive to an output of said DC amplifier for applying the first predetermined potential to the base of said first transistor and applying the second predetermined potential to the base of said second transistor, or conversely effecting the same, to produce a bias current in said push-pull amplifier which balances one half of said first potential with a potential at said first junction.

Claim 3

An amplifier comprising: (a) means for supplying an input signal to said amplifier; (b) a push-pull amplifier including first and second complementary transistors, each of said first and second transistors having its emitter commonly connected with the emitter of the other thereof at an output terminal, said output terminal being connected to a load at a first junction, means for applying a positive and a negative DC voltage to collectors of said first and second transistors respectively; (c) a DC amplifier having a non-inverting input terminal and an inverting input terminal, said means for supplying an input signal being connected to said non-inverting input terminal and an output of said push-pull amplifier being connected to said inverting input terminal; (d) a first biasing power supply circuit, having a positive and a negative terminal, said first biasing power supply circuit being operative to produce a predetermined first potential and a first biasing current, and having first and second halves connected together at a second junction, first terminals of said first and second halves being connected to bases of said first and second transistors, each of said first and second halves being effective to establish one half of said first potential, said means for supplying an input signal being connected to said second junction; (e) a second biasing power supply circuit having a positive and a negative terminal, said second biasing power supply circuit being operative to produce a predetermined second potential and a second biasing current, said second biasing power supply circuit including third and fourth halves connected together at a third junction, each of said third and fourth halves being effective to establish one half of said second potential, said DC amplifier having an output connected to said third junction; and (f) means responsive to an output of said DC amplifier for applying the first predetermined potential to the base of said first transistor and applying the second predetermined potential to the base of said second transistor, or conversely effecting the same, to produce a bias current in said push-pull amplifier which balances one half of said first potential at said first junction.

Claim 4

An amplifier comprising: (a) means for supplying an input signal to said amplifier; (b) a push-pull amplifier including first and second complementary transistors, each of said first and second transistors having its emitter commonly connected with the emitter of the other thereof at an output terminal, said output terminal being connected to a load at a first junction, means for applying a positive and a negative DC voltage to collectors of said first and second transistors respectively; (c) a DC amplifier having a non-inverting input terminal and an inverting input terminal, said means for supplying an input signal being connected to said non-inverting input terminal and an output of said push-pull amplifier being connected to said inverting input terminal; (d) a first biasing power supply circuit, having a positive and a negative terminal, said first biasing power supply circuit being operative to produce a predetermined first potential and a first biasing current, and having first and second halves connected together at a second junction, first terminals of said first and second halves being connected to bases of said first and second transistors, each of said first and second halves being effective to establish one half of said first potential, said means for supplying an input signal being connected to said second junction; (e) a second biasing power supply circuit having a positive and a negative terminal, said second biasing power supply circuit being operative to produce a predetermined second potential and a second biasing current, said second biasing power supply circuit including third and fourth halves connected together at a third junction, each of said third and fourth halves being effective to establish one half of said second potential, said DC amplifier having an output connected to said third junction; and (f) means responsive to an output of said DC amplifier for applying the first predetermined potential to the base of said first transistor and applying the second predetermined potential to the base of said second transistor, or conversely effecting the same, to produce a bias current in said push-pull amplifier which balances one half of said first potential at said first junction.

Claim 5

An amplifier as defined in claim 1 or 2, wherein said first half of said first biasing power supply circuit is connected to said non-inverting terminal and the output terminal of said DC amplifier is connected to said first half of said second biasing power supply circuit.

Claim 6

An amplifier arrangement as defined in claim 1 or 2, wherein said responsive means includes first and second diodes, an anode of said first diode being connected to a positive terminal of said first biasing power supply circuit, an anode of said second diode being connected to a positive terminal of said second biasing power supply circuit, a cathode of each of said first and second diodes being jointly connected to the base of said first transistor, and third and fourth diodes, the cathode of said third diode being connected to a negative terminal of said first biasing power supply circuit, the cathode of said fourth diode being connected to a negative terminal of said second biasing power supply circuit, an anode of each of said third and fourth diodes being jointly connected to the base of said second transistor.

Claim 7

An amplifier as defined in claim 1 or 2, wherein said responsive means includes a third transistor having its collector and emitter commonly connected to the collector and emitter respectively of said first transistor and a fourth transistor having its collector and emitter commonly connected to the collector and emitter respectively of said second transistor and said halves of said second biasing power supply circuit being connected respectively to bases of said third and fourth transistors.

Claim 8

An amplifier as defined in claim 2, wherein said responsive means includes two pairs of transistors, wherein each pair comprises two transistors with their respective collectors and emitters commonly connected.

Claim 9

An amplifier as defined in claim 1 or 6, which further comprises a second DC amplifier having a non-inverting terminal connected to said means for supplying an input signal, and an inverting terminal thereof connected to the inverting terminal of the first mentioned DC amplifier and through a resistor to ground, the output of said second DC amplifier be connected to said third junction.

Claim 10

An amplifier as defined in claim 6, further comprising at least one additional transistor connected to one of said two pairs of transistors to form a Darlington amplifier, an output terminal of which is connected to the load.

Claim 11

An amplifier as defined in claim 1, wherein said responsive means includes two pairs of transistors, wherein each pair includes two transistors connected so that respective collectors and emitters are commonly connected.

Claim 12

An amplifier as defined in claim 9, which further comprises a second DC amplifier wherein a non-inverting terminal thereof is connected to said means for supplying an input signal, and an inverting terminal thereof is connected to the inverting terminal of the first mentioned amplifier and through a resistor to ground, an output of said second DC amplifier being connected to said third junction.

Claim 13

An amplifier as defined in claim 9 or 10, further comprising at least one additional transistor connected to one of said pairs of transistors to form a Darlington amplifier, an output terminal of said Darlington amplifier being connected to the load.

Claim 14

A single-ended push-pull amplifier comprising: first and second transistors of complementary types having their collector-emitter paths connected in series and providing an output current and an output voltage to a load, said output current and output voltage being taken between the emitter of said first transistor and the emitter of said second transistor; first and second means for applying an input signal voltage to bases of said first and second transistors, respectively; said first and second means for applying including first and second bias sources; said first and second bias sources being effective in the absence of said signal voltage to maintain a predetermined bias current to the bases of said first and second transistors; a dc differential amplifier having a non-inverting input, an inverting input and a gain much greater than one; said input signal being connected to one of said non-inverting and inverting inputs; said output voltage being connected to the other of said non-inverting and inverting inputs; third and fourth means for applying an output of said differential amplifier to said first and second transistors, respectively; said third and fourth means for applying including third and fourth bias sources having voltages respectively substantially equal to said first and second bias sources; first means for transferring the one of said first and third means having a more positive voltage for application to said first transistor; and second means for transferring the one of said second and fourth means having a more negative voltage for application to said second transistor.

Claim 15

A single-ended push-pull amplifier comprising: first and second transistors of complementary types having their collector-emitter paths connected in series and providing an output current and an output voltage to a load, said output current and output voltage being taken between the emitter of said first transistor and the emitter of said second transistor; first and second means for applying an input signal voltage to bases of said first and second transistors, respectively; said first and second means for applying including first and second bias sources; said first and second bias sources being effective in the absence of said signal voltage to maintain a predetermined bias current to the bases of said first and second transistors; a dc differential amplifier having a non-inverting input, an inverting input and a gain much greater than one; said input signal being connected to one of said non-inverting and inverting inputs; said output voltage being connected to the other of said non-inverting and inverting inputs; third and fourth means for applying an output of said differential amplifier to said first and second transistors, respectively; said third and fourth means for applying including third and fourth bias sources having voltages respectively substantially equal to said first and second bias sources; first means for transferring the one of said first and third means having a more positive voltage for application to said first transistor; and second means for transferring the one of said second and fourth means having a more negative voltage for application to said second transistor.

Claim 16

A single-ended push-pull amplifier according to claim 12 wherein said first means for transferring includes first and third diodes having their cathode terminals connected to the base of said first transistor, said first diode having its anode terminal connected to said first bias source, said third diode having its anode terminal connected to said third bias source, said second means for transferring includes second and fourth diodes having their anode terminals connected to the base of said second transistor, said second diode having its cathode terminal connected to said second bias sources, and said fourth diode having its cathode terminal connected to said fourth bias source.

Claim 17

A single-ended push-pull amplifier according to claim 12 wherein said third means for applying includes a third transistor having its collector and emitter connected respectively to the collector and emitter of said first transistor and having its base connected to said third bias source, a fourth transistor having its collector and emitter connected respectively to the collector and emitter of said fourth bias source.

Claim 18

A single-ended push-pull amplifier according to claim 14, further comprising a fifth transistor having its base connected to the emitters of said first and third transistor and its collector connected to a first voltage source of a first polarity, a sixth transistor having its base connected to the emitters of said second and fourth transistors and its collector connected to a second voltage having a polarity opposite said first polarity, said output current and voltage being taken between the emitters of said fifth and sixth transistors.

Claim 19

A single-ended push-pull amplifier according to claim 12, 13, 14 or 15 further comprising means for setting the gain of said amplifier.