← Back to Patent Explorer
US4367520A Expired / Lapsed US ⏱️ 0.0 years remaining

Method and apparatus for controlling pulse width modulation inverter circuit

Assignee: Hitachi Ltd
•
Filing: 1980-12-29
•
Granted: 1983-01-04
•
Expires: 2000-12-29
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A pulse width modulation inverter in which a staircase wave signal is used as the modulating wave. The number M of the stair steps of the staircase wave signal is set at a given integer in a range defined by 2≦M≦(N-3)/2 where N represents the number of the carrier waves appearing during a half period of the staircase wave and an odd integer not smaller than 7.

Inventors

  • 👤 Nobuyoshi Muto
  • 👤 Yasuo Matsuda
  • 👤 Shigeki Morinaga
  • 👤 Yasuyuki Sugiura

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 16:02
CPC Classifications
H; H02; H02M; H02M7/00; H02M7/42; H02M7/44; H02M7/48; H02M7/505; H02M7/515; H02M7/525; H02M7/527

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 106 words
A method of controlling a pulse width modulation inverter circuit in which firing of individual switching elements constituting said inverter circuit is controlled on the basis of a control signal derived through comparisons of a carrier wave signal with a plurality of different signal levels to produce a modulating wave signal having a staircase waveform, wherein a number M of the stair steps of said staircase waveform is selected at a given integer in a range defined by 2≦M≦(N-3)/2 where N represents the number of said carrier waves appearing during a half period of said staircase waveform and is an odd integer not smaller than 7.
Claim 2
Independent Claim 106 words
A method of controlling a pulse width modulation inverter circuit in which firing of individual switching elements constituting said inverter circuit is controlled on the basis of a control signal derived through comparisons of a carrier wave signal with a plurality of different signal levels to produce a modulating wave signal having a staircase waveform, wherein a number M of the stair steps of said staircase waveform is selected at a given integer in a range defined by 2≦M≦(N-3)/2 where N represents the number of said carrier waves appearing during a half period of said staircase waveform and is an odd integer not smaller than 7.
Claim 3
Independent Claim 341 words
An apparatus for controlling a pulse width modulation inverter, comprising: a carrier wave generator circuit for generating a carrier wave having a predetermined frequency and amplitude; an absolute value circuit for forming an absolute value wave signal the amplitude of which represents the absolute value of said carrier signal; a staircase level generator for generating a plurality of staircase levels; a comparator for comparing the amplitude of said absolute value wave signal with the amplitudes of said staircase levels and producing a plurality of comparator output signals representing the results of the respective comparisons between the absolute value wave signal and the different staircase levels; a rectangular wave signal generator for generating a rectangular wave signal with a predetermined period corresponding to a period of said carrier wave; a ring counter for receiving said rectangular wave signal and producing in accordance with said rectangular wave signal an output signal defining a first period for a modulating signal and output signals defining a plurality of staircase periods within said first period for selecting different ones of said comparator output signals during respective staircase periods; and a firing circuit coupled to receive said comparator output signals and said ring counter output signals for selecting predetermined ones of said comparator output signals during said first period in accordance with said output signals defining a plurality of staircase periods, and for generating a pulse width modulating signal in accordance with said selection of comparator output signals and applying said pulse width modulating signal to switching elements constituing said inverter, wherein the staircase periods are determined to provide a staircase waveform within said first period for said modulating signal based on the selection of said comparator output signals by said firing circuit, wherein said staircase waveform is defined by a relationship of 2≦M≦(N-3)/2 where M is an integer number of staircase steps during half a period of said staircase waveform, and N is the number of carrier waveforms appearing during a half period of said staircase waveform and is an odd integer not smaller than 7.
Claim 4
Independent Claim 341 words
An apparatus for controlling a pulse width modulation inverter, comprising: a carrier wave generator circuit for generating a carrier wave having a predetermined frequency and amplitude; an absolute value circuit for forming an absolute value wave signal the amplitude of which represents the absolute value of said carrier signal; a staircase level generator for generating a plurality of staircase levels; a comparator for comparing the amplitude of said absolute value wave signal with the amplitudes of said staircase levels and producing a plurality of comparator output signals representing the results of the respective comparisons between the absolute value wave signal and the different staircase levels; a rectangular wave signal generator for generating a rectangular wave signal with a predetermined period corresponding to a period of said carrier wave; a ring counter for receiving said rectangular wave signal and producing in accordance with said rectangular wave signal an output signal defining a first period for a modulating signal and output signals defining a plurality of staircase periods within said first period for selecting different ones of said comparator output signals during respective staircase periods; and a firing circuit coupled to receive said comparator output signals and said ring counter output signals for selecting predetermined ones of said comparator output signals during said first period in accordance with said output signals defining a plurality of staircase periods, and for generating a pulse width modulating signal in accordance with said selection of comparator output signals and applying said pulse width modulating signal to switching elements constituing said inverter, wherein the staircase periods are determined to provide a staircase waveform within said first period for said modulating signal based on the selection of said comparator output signals by said firing circuit, wherein said staircase waveform is defined by a relationship of 2≦M≦(N-3)/2 where M is an integer number of staircase steps during half a period of said staircase waveform, and N is the number of carrier waveforms appearing during a half period of said staircase waveform and is an odd integer not smaller than 7.

References Cited (Backward Citations)

US3662247A Cited
GB1380730A Cited
JPS5347806A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-01-03 1986-07-05 1987-01-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-01-03 1990-07-05 1991-01-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-01-03 1994-07-05 1995-01-04 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag