Impedance transducer

Claim 2

A variable impedance circuit, comprising: first and second transistors mounted on a common thermally conductive substrate so that said transistors remain at substantially the same temperature, each transistor having two main electrodes and a control electrode means, said transistors exhibiting essentially the same electrical characteristics at said electrodes; a negative feedback amplifier having an input terminal and connected in circuit with said first transistor to vary the impedance between the main electrode means of said first transistor in a predetermined manner in accordance with an impedance control signal applied to said input terminal; a memory circuit coupled to said input terminal of said negative feedback amplifier for setting said impedance control signal at a desired value; and means for maintaining essentially the same electrical condition at each of said control electrode means, so that the impedance presented between the main electrodes of the second transistor is essentially equal to the impedance between the main electrodes of said first transistor.

Claim 3

A variable impedance circuit as claimed in claim 1 wherein said transistors are phototransistors, further comprising a common light emitting diode for optically driving the control electrode means of both said phototransistors.

Claim 4

A variable impedance circuit as claimed in claim 1 wherein said two active elements comprise field-effect transistors.

Claim 5

A variable impedance circuit as claimed in claim 1 wherein said negative feedback amplifier comprises at least one operational amplifier.

Claim 6

A variable impedance circuit as claimed in claim 1 wherein said negative feedback amplifier comprises transistors.

Claim 7

A variable impedance circuit as claimed in claim 1 wherein said memory circuit comprises a capacitor and a switch connected in parallel between the inverting input terminal and the output terminal of an operational amplifier, and a switch for connecting said inverting input terminal to a negative or positive power source.

Claim 8

A variable impedance circuit as claimed in claim 1, further comprising a voltage meter for detecting the impedance of said active element at the output side, said voltage meter being connected through an operational amplifier to a junction point of the input terminal of said negative feedback amplifier and an output terminal of said memory circuit.

Claim 9

The impedance circuit according to claim 1, further comprising a constant current source connected in series with the main electrodes of said first transistor.

Claim 10

An impedance transducer comprising a first group of two field-effect transistors which are formed on one thermally conductive base plate and whose gates are connected to each other; a second group of field-effect transistors which are formed on a thermally conductive base plate and whose polarity is opposite that of the first group and which are similarly connected; two operational amplifiers whose outputs are respectively input to the gates of said field-effect transistors; and a memory circuit comprising an integrator which comprises a capacitor and a high input impedance operational amplifier and whose output is input to each of said operational amplifiers; wherein each of said transistor groups is used for providing a negative feedback amplification for the corresponding one of said two operational amplifiers; means for causing a constant current to flow through the output circuit of one of the transistors of each group for negative feedback amplification, so that an impedance proportional to the potential of the input from said integrator to each of said two operational amplifiers is presented as the internal impedance of the other transistor of each group.

Claim 11

An impedance transducer comprising a first group of two field-effect transistors which are formed on one thermally conductive base plate and whose gates are connected to each other; a second group of field-effect transistors which are formed on a thermally conductive base plate and whose polarity is opposite that of the first group and which are similarly connected; two operational amplifiers whose outputs are respectively input to the gates of said field-effect transistors; and a memory circuit comprising an integrator which comprises a capacitor and a high input impedance operational amplifier and whose output is input to each of said operational amplifiers; wherein each of said transistor groups is used for providing a negative feedback amplification for the corresponding one of said two operational amplifiers; means for causing a constant current to flow through the output circuit of one of the transistors of each group for negative feedback amplification, so that an impedance proportional to the potential of the input from said integrator to each of said two operational amplifiers is presented as the internal impedance of the other transistor of each group.

Claim 12

An impedance transducer as claimed in claim 9, further comprising a constant voltage source inserted between the input terminals of each of said two operational amplifiers connected to said integrator, wherein the output circuits of said one transistor of each of the negative feedback transistor groups are connected in series, their junction point is grounded, the output circuits of the other transistors of each of said groups are connected in series, so that an impedance proportional to the difference between the output potential of the integrator and a constant potential is presented across one of said output circuits of said other transistors of one of said groups.

Claim 13

An impedance transducer as claimed in claim 9, further comprising a constant voltage source inserted between the input terminals of each of said two operational amplifiers and ground; means for causing a constant current to flow separately through the output circuits of the negative feedback transistor groups; one terminal of the output circuit of each of said negative feedback transistor groups being connected to a power source of a certain voltage, so that an impedance is presented proportional to the potential derived by subtracting the potential at the output terminal of the integrator from the voltage of said power source.