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US4362574A Expired / Lapsed US ⏱️ 0.0 years remaining

Integrated circuit and manufacturing method

Assignee: Fairchild Semiconductor Corp
•
Filing: 1980-07-09
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Granted: 1982-12-07
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Expires: 2000-07-09
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Abstract

Abstract A method used to form a field effect device and a bipolar device in different regions of the same semiconductor material, such method including the step of forming a doped layer in the semiconductor material which extends from the surface of the semiconductor material to a predetermined depth in such semiconductor material and which extends laterally along the surface of the semiconductor material through the different regions wherein the field effect device and the bipolar device are formed. Such formed doped layer has the same type conductivity as that of the semiconductor material but has a doping concentration at least an order of magnitude greater than that of the semiconductor material. The doping concentration of the doped layer is sufficiently high to prevent undesired surface state inversion effects and enable effective control of the channel width of the field effect device. On the other hand, the doping concentration of the doped layer is sufficiently low to provide proper breakdown voltages for both the bipolar device and the field effect device. In this way, since the same doping concentration is used for both the bipolar device region and the field effect device region, the doped layer may be formed in the entire surface region of the semiconductor material without the requirement of additional masking steps. Further, with a buried channel field effect device the portion of the doped layer in the field effect device region provides the upper comparatively higher doped gate portion of the device while the portion of the semiconductor material below the buried channel region provides the lower gate portion of the device, such upper and lower gate portions being coupled to a gate electrode to enable control of the effective channel width from both upper and lower sides thereof.

Inventors

  • 👤 Ara Gevondyan

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 09:37
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/21; H10D; H10D62/00; H10D62/10; H10D62/102; H10D62/112; H10D84/00; H10D84/01; H10D84/0107; H10D84/02; H10D84/03; H10D84/038; H10D84/40; H10D84/401; H10P30/202; H10P30/204; H10P30/28; H10W; H10W10/00; H10W10/01; H10W10/031; H10W10/30

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 175 words
A method for forming a field effect device having source and drain regions formed in a first region of a semiconductor material and a bipolar device having base, collector and emitter regions formed in a second, different region of the same semiconductor material, such field effect device having a buried channel region formed in the semiconductor material and spaced from a surface of such semiconductor material, such buried channel region having a conductivity type opposite the conductivity type of the semiconductor material, comprising the steps of: (a) forming a doped layer in the semiconductor material extending from the surface of the semiconductor material to the buried channel region, such doped layer extending laterally along the surface of the semiconductor material through the source and drain regions of the field effect device and the emitter and base regions of the bipolar device, such doped layer having the same conductivity type as the conductivity type of the semiconductor material; and, (b) forming a gate electrode electrically connected to both the formed doped layer and the semiconductor material.
Claim 2
Independent Claim 175 words
A method for forming a field effect device having source and drain regions formed in a first region of a semiconductor material and a bipolar device having base, collector and emitter regions formed in a second, different region of the same semiconductor material, such field effect device having a buried channel region formed in the semiconductor material and spaced from a surface of such semiconductor material, such buried channel region having a conductivity type opposite the conductivity type of the semiconductor material, comprising the steps of: (a) forming a doped layer in the semiconductor material extending from the surface of the semiconductor material to the buried channel region, such doped layer extending laterally along the surface of the semiconductor material through the source and drain regions of the field effect device and the emitter and base regions of the bipolar device, such doped layer having the same conductivity type as the conductivity type of the semiconductor material; and, (b) forming a gate electrode electrically connected to both the formed doped layer and the semiconductor material.

References Cited (Backward Citations)

US4074301A Cited
US4113513A Cited
US4066917A Cited
US4140547A Cited
US4120707A Cited
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US4218267A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-12-06 1986-06-07 1986-12-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-12-06 1990-06-07 1990-12-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-12-06 1994-06-07 1994-12-07 $7700.00 Window Closed / Lapsed

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