Key switch information assignor

Claim 2

A key switch information assignor comprising: a data processing unit having a CPU, a CPU clock generator for driving the CPU, a memory for loading a program for operating the CPU, an event memory for storing key information, an assignment memory for storing key codes, and an input/output port, said CPU producing successive keyboard and octave codes, a keyboard circuit having keyboard switches, said switches being divided into different sound ranges, corresponding keyboard switches of respective sound ranges being interconnected at a common input end coupled to said input/output port to receive said keyboard and octave codes for thereby polling said keyboard switches, and interconnected at their output ends whereby switches corresponding to common notes produce a multiplexed signal of key information, said key information being coupled to the input/output port of said data processing unit, said data processing unit having means for comparing said key information with the content of the event memory which stores therein the key information from a previous polling of said keyboard switches, said data processing unit having means for producing a note code only in response to an event which results from a change in the bit position between the previous key information and the new key information and forming a key code therefrom by combining the note code produced together with the particular keyboard code and octave code sent to the keyboard circuit which produced that key information, said key code being written into said assignment memory for further transfer.

Claim 3

A key switch information assignor according to claim 1, wherein said keyboard and octave codes successively designated by the data processing unit are used as the value of a register of said CPU as well as for addressing said event memory.

Claim 4

A key switch information assignor according to claim 1, and further comprising a direct memory access controller for transferring the content of said assignment memory to assignment memories of other devices.

Claim 5

A key switch information assignor comprising: a data processing unit having a CPU, a CPU clock generator for driving the CPU, a memory for loading a program for operating the CPU, an event memory for storing key information, an assignment memory for storing key codes, and an input/output port, said CPU producing successive keyboard and octave codes, a keyboard circuit having keyboard switches, said switches being divided into different sound ranges, corresponding keyboard switches of respective sound ranges being interconnected at a common input end coupled to said input/output port to receive said keyboard and octave codes for thereby polling said keyboard switches, and interconnected at their output ends whereby switches corresponding to common notes produce a multiplexed signal of key information, said key information being coupled to the input/output port of said data processing unit, said data processing unit having means for comparing said key information with the content of the event memory which stores therein the key information from a previous polling of said keyboard switches, said data processing unit having means for producing a note code only in response to an event which results from a change in the bit position between the previous key information and the new key information and forming a key code therefrom by combining the note code produced together with the particular keyboard code and octave code sent to the keyboard circuit which produced that key information, said key code being written into said assignment memory for further transfer, and an envelope generator for receiving said key code from said assignment memory and producing a release end signal when that key has completed sounding, and wherein said data processing unit further comprises a release end memory receiving said release end signal, comparing it with a previous release end signal, and determining the suspension of a tone production and erasure of said key code from its respective channel in the assignment memory corresponding to the bit position of the entered release end signal where the suspension of the tone production is decided.

Claim 6

A key switch information assignor comprising: a data processing unit having a CPU, a CPU clock generator for driving the CPU, a memory for loading a program for operating the CPU, an event memory for storing key information, an assignment memory for storing key codes, and an input/output port, said CPU producing successive keyboard and octave codes, a keyboard circuit having keyboard switches, said switches being divided into different sound ranges, corresponding keyboard switches of respective sound ranges being interconnected at a common input end coupled to said input/output port to receive said keyboard and octave codes for thereby polling said keyboard switches, and interconnected at their output ends whereby switches corresponding to common notes produce a multiplexed signal of key information, said key information being coupled to the input/output port of said data processing unit, said data processing unit having means for comparing said key information with the content of the event memory which stores therein the key information from a previous polling of said keyboard switches, said data processing unit having means for producing a note code only in response to an event which results from a change in the bit position between the previous key information and the new key information and forming a key code therefrom by combining the note code produced together with the particular keyboard code and octave code sent to the keyboard circuit which produced that key information, said key code being written into said assignment memory for further transfer, and an envelope generator for receiving said key code from said assignment memory and producing a release end signal when that key has completed sounding, and wherein said data processing unit further comprises a release end memory receiving said release end signal, comparing it with a previous release end signal, and determining the suspension of a tone production and erasure of said key code from its respective channel in the assignment memory corresponding to the bit position of the entered release end signal where the suspension of the tone production is decided.

Claim 7

A key switch information assignor comprising: a data processing unit having a CPU, a CPU clock generator for driving the CPU, a memory for loading a program for operating the CPU, an event memory for storing key information, an assignment memory for storing key codes, and an input/output port, said CPU producing successive keyboard and octave codes, a keyboard circuit having keyboard switches, said switches being divided into different sound ranges, corresponding keyboard switches of respective sound ranges being interconnected at a common input end coupled to said input/output port to receive said keyboard and octave codes for thereby polling said keyboard switches, and interconnected at their output ends whereby switches corresponding to common notes produce a multiplexed signal of key information, said key information being coupled to the input/output port of said data processing unit, said data processing unit having means for comparing said key information with the content of the event memory which stored therein the key information from a previous polling of said keyboard switches, said data processing unit having means for producing a note code only in response to an event which results from a change in the bit position between the previous key information and the new key information and forming a key code therefrom by combining the note code produced together with the particular keyboard code and octave code sent to the keyboard circuit which produced that key information, said key code being written into said assignment memory for further transfer, an envelope generator receiving said key code from said assignment memory and producing a release end signal when that key has completed sounding, and wherein said data processing unit further comprises a release end memory receiving said release end signal, comparing it with a previous release end signal and determining the suspension of a tone production and erasure of said key code from its respective channel in the assignment memory corresponding to the bit position of the entered release end signal where the suspension of the tone production is decided, and wherein when all channels of said assignment memory are used and a new event occurs, said CPU produces a demand signal whereby a key corresponding to the key code written in the assignment memory is released thereby demanding a highspeed release from said envelope generator.

Claim 8

A key switch information assignor comprising: a data processing unit having a CPU, a CPU clock generator for driving the CPU, a memory for loading a program for operating the CPU, an event memory for storing key information, an assignment memory for storing key codes, and an input/output port, said CPU producing successive keyboard and octave codes, a keyboard circuit having keyboard switches, said switches being divided into different sound ranges, corresponding keyboard switches of respective sound ranges being interconnected at a common input end coupled to said input/output port to receive said keyboard and octave codes for thereby polling said keyboard switches, and interconnected at their output ends whereby switches corresponding to common notes produce a multiplexed signal of key information, said key information being coupled to the input/output port of said data processing unit, said data processing unit having means for comparing said key information with the content of the event memory which stored therein the key information from a previous polling of said keyboard switches, said data processing unit having means for producing a note code only in response to an event which results from a change in the bit position between the previous key information and the new key information and forming a key code therefrom by combining the note code produced together with the particular keyboard code and octave code sent to the keyboard circuit which produced that key information, said key code being written into said assignment memory for further transfer, an envelope generator receiving said key code from said assignment memory and producing a release end signal when that key has completed sounding, and wherein said data processing unit further comprises a release end memory receiving said release end signal, comparing it with a previous release end signal and determining the suspension of a tone production and erasure of said key code from its respective channel in the assignment memory corresponding to the bit position of the entered release end signal where the suspension of the tone production is decided, and wherein when all channels of said assignment memory are used and a new event occurs, said CPU produces a demand signal whereby a key corresponding to the key code written in the assignment memory is released thereby demanding a highspeed release from said envelope generator.

Claim 9

A key switch information assignor according to claim 5, wherein said envelope generator further comprises a release level variation step memory for storing release level variation steps for each channel of said assignment memory and is supplied with a signal indicating the keyswitch ON/OFF states.