← Back to Patent Explorer
US4357596A Expired / Lapsed US ⏱️ 0.0 years remaining

Multi-line scan mark verification circuit

Assignee: National Computer Systems Inc
•
Filing: 1980-05-30
•
Granted: 1982-11-02
•
Expires: 2000-05-30
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract In a document scanning scheme where data is preceded on the document by a preprinted document scan mark, circuitry is employed to utilize multiple line scans of the scan mark by a line scan camera to verify the presence of a scan mark and avoid erroneous response to random marks on the document.

Inventors

  • 👤 Michal M. Feilchenfeld

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 15:52
CPC Classifications
G; G06; G06K; G06K7/00; G06K7/10; G06K7/10544; G06K7/10821; G06K7/1092

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 274 words
In an optical scanning system including a line scan camera for scanning a document on a line-by-line basis and developing both a video valid output signal indicative of valid video information being viewed by the camera and an electrical output signal indicative of the document information from each scan line, said document including areas for accommodating data information and one or more pre-printed scan marks for establishing the location of the document and alerting the system information processing circuitry to the fact that data information areas of the document are about to be scanned, said system including memory means for generating scan mark location information identifying the scan mark location for a predetermined document format, the improvement for verifying the presence of a scan mark via two or more scan lines, said improvement comprising: first circuit means responsive to said scan mark location information from said memory means for acknowledging a first scan line identification of a scan mark and developing an output signal indicative thereof, second circuit means responsive to said scan mark location information from said memory means for acknowledging a scan line identification of a scan mark and developing an output signal indicative thereof, and third circuit means responsive to the output signal of said first circuit means for inhibiting the operation of said second circuit means for a predetermined time duration following identification of said first scan line of the scan mark, the output signal generated by said second means following said predetermined time duration being a system scan mark verification signal for alerting said system information processing circuitry to the fact that a valid scan mark has been detected.
Claim 2
Dependent Claim 274 words
In an optical scanning system including a line scan camera for scanning a document on a line-by-line basis and developing both a video valid output signal indicative of valid video information being viewed by the camera and an electrical output signal indicative of the document information from each scan line, said document including areas for accommodating data information and one or more pre-printed scan marks for establishing the location of the document and alerting the system information processing circuitry to the fact that data information areas of the document are about to be scanned, said system including memory means for generating scan mark location information identifying the scan mark location for a predetermined document format, the improvement for verifying the presence of a scan mark via two or more scan lines, said improvement comprising: first circuit means responsive to said scan mark location information from said memory means for acknowledging a first scan line identification of a scan mark and developing an output signal indicative thereof, second circuit means responsive to said scan mark location information from said memory means for acknowledging a scan line identification of a scan mark and developing an output signal indicative thereof, and third circuit means responsive to the output signal of said first circuit means for inhibiting the operation of said second circuit means for a predetermined time duration following identification of said first scan line of the scan mark, the output signal generated by said second means following said predetermined time duration being a system scan mark verification signal for alerting said system information processing circuitry to the fact that a valid scan mark has been detected.
Claim 3
Dependent Claim 34 words
In an optical scanning system as claimed in claim 1 wherein said third circuit means includes counter means for inhibiting the operation of said second circuit means for a predetermined number of scan lines.
Claim 4
Dependent Claim 78 words
In an optical scanning system as claimed in claim 1 wherein said scan line camera includes a line array of photosensitive devices, said electrical output signal comprised of signal elements corresponding to the signal output of each of said photosensitive devices viewing a discrete picture element of said document during a scan line, said third circuit means including a counter means for inhibiting the operation of said second circuit means for a predetermined number of said picture elements.

References Cited (Backward Citations)

US3528059A Cited
US3463906A Cited
US3643069A Cited
US3578953A Cited
US3852715A Cited
US3810094A Cited
GB1371493A Cited
US3852573A Cited
US4009467A Cited
JPS54932A Cited
US4300123A Cited
US4298859A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-11-01 1986-05-03 1986-11-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-11-01 1990-05-03 1990-11-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-11-01 1994-05-03 1994-11-02 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag