US4356414A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Monolithically integrable logic circuit
Assignee: Siemens AG
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Filing: 1980-01-17
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Granted: 1982-10-26
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Expires: 2000-01-17
Abstract
Abstract Monolithically integrable logic circuit having at least one NAND function and a Darlington stage serving as the signal output of the circuit, including a differential amplifier having its non-inverted output connected to the input of the Darlington stage, the differential amplifier including at least two identical input transistors with control electrodes which form the signal inputs of the circuit and a reference transistor which is identical to the input transistors, the reference transistor having one of its current carrying electrodes connected to the same current carrying electrodes of the input transistors, a current source connected to the connection of the input and reference transistor electrodes, and a switch-over system including transistors and diodes for switching the input transistors to different threshold voltage values, the switch-over system being connected to the control electrode of the reference transistor.
Inventors
- 👤 Helmut Guntner
- 👤 Ernst Wittenzellner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 19:02
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/0175; H03K19/017581; H03K17/00; H03K17/30; H03K17/51; H03K17/56; H03K17/60; H03K17/603; H03K19/02; H03K19/08; H03K19/082; H03K19/086
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
330 words
Monolithically integrable logic circuit having at least one NAND function and a Darlington stage serving as the signal output of the circuit, comprising a differential amplifier having its non-inverted output connected to the input of the Darlington stage, said differential amplifier including at least two identical input transistors with control electrodes which form the signal inputs of the circuit and a reference transistor which is identical to said input transistors, said reference transistor having one of its current carrying electrodes connected to the same current carrying electrodes of said input transistors, a current source connected to the connection of said input and reference transistor electrodes, switch-over means including transistors and diodes for switching said input transistors to different threshold voltage values, said switch-over means being connected to the control electrode of said reference transistor and said switch-over means including a first current source, a first circuit node connected to said first current source and forming the connection of said switch-over means to the control electrode of said reference transistor, a first Zener diode connected in the blocking direction from said first circuit node to ground, a first transistor having its emitter electrode connected to ground, at least one diode connected in the flow direction from said first circuit node to the collector electrode of said first transistor, a second circuit node connected to the control electrode of said first transistor, a first leak resistor connected between said second circuit node and ground, a second current source connected to said second circuit node, a second transistor havings its collector electrode connected to said second circuit node and its emitter electrode connected to ground, a voltage divider connected to the control electrode of said second transistor, and a third current source, said voltage divider being formed of a series circuit of a second leak resistor connected to ground and a second Zener diode connected in the blocking direction to said second leak resistor with its cathode connected to said third current source.
Claim 2
Dependent Claim
330 words
Monolithically integrable logic circuit having at least one NAND function and a Darlington stage serving as the signal output of the circuit, comprising a differential amplifier having its non-inverted output connected to the input of the Darlington stage, said differential amplifier including at least two identical input transistors with control electrodes which form the signal inputs of the circuit and a reference transistor which is identical to said input transistors, said reference transistor having one of its current carrying electrodes connected to the same current carrying electrodes of said input transistors, a current source connected to the connection of said input and reference transistor electrodes, switch-over means including transistors and diodes for switching said input transistors to different threshold voltage values, said switch-over means being connected to the control electrode of said reference transistor and said switch-over means including a first current source, a first circuit node connected to said first current source and forming the connection of said switch-over means to the control electrode of said reference transistor, a first Zener diode connected in the blocking direction from said first circuit node to ground, a first transistor having its emitter electrode connected to ground, at least one diode connected in the flow direction from said first circuit node to the collector electrode of said first transistor, a second circuit node connected to the control electrode of said first transistor, a first leak resistor connected between said second circuit node and ground, a second current source connected to said second circuit node, a second transistor havings its collector electrode connected to said second circuit node and its emitter electrode connected to ground, a voltage divider connected to the control electrode of said second transistor, and a third current source, said voltage divider being formed of a series circuit of a second leak resistor connected to ground and a second Zener diode connected in the blocking direction to said second leak resistor with its cathode connected to said third current source.
Claim 3
Dependent Claim
48 words
Circuit according to claim 1, wherein said current sources are transistors, said transistors are bipolar transistors, and said input and reference transistors and the current source transistors are of one transistor type and said switch-over means transistors and the Darlington stage transistors are of the opposite transistor type.
Claim 4
Dependent Claim
14 words
Circuit according to claim 1, wherein said input and reference transistors are pnp transistors.
Claim 5
Dependent Claim
21 words
Circuit according to claim 1, wherein said connected current carrying elecrodes of said input and reference transistors are the emitter electrodes.
Claim 6
Dependent Claim
71 words
Circuit according to claim 1, wherein said current sources are transistors, the current source transistors are of the same type as said input and reference transistors, the emitter electrode of the current source transistors being connected to a supply potential, the control electrodes of the current source transistors being connected to control potentials, and said connections to said current sources being connections to the collector electrodes of the current source transistors.
Claim 7
Dependent Claim
28 words
Circuit according to claim 5, wherein said control potentials connected to the control electrodes of the current source transistors are in the form of a common control potential.
Claim 8
Dependent Claim
72 words
Circuit according to claim 1, wherein the first-mentioned current source is a transistor which is of the same type as said input and reference transistors, the emitter electrode of the current source transistor being connected to a supply potential, the control electrode of the current source transistor being connected to a control potential, and said connection to said current source being a connection to the collector electrode of the current source transistor.
References Cited (Backward Citations)
US3573488A
Cited
US4135103A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-10-25 | 1986-04-26 | 1986-10-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-10-25 | 1990-04-26 | 1990-10-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-10-25 | 1994-04-26 | 1994-10-26 | $7700.00 | Window Closed / Lapsed |