US4355342A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Power circuit including means for automatically protecting a chopping transistor thereof
Assignee: SP EL Srl
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Filing: 1980-01-17
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Granted: 1982-10-19
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Expires: 2000-01-17
Abstract
Abstract A chopping transistor connected across a d-c power supply, in series with a load such as a motor, has its base connected to an output of an oscillator generating a train of voltage pulses V 1 by which that transistor is alternately turned on and off. A threshold sensor emits a series of monitoring pulses V 2 of the same polarity as the conduction-establishing control pulses V 1 when the collector/emitter voltage of the transistor surpasses a certain limit; the joint appearance of signals V 1 and V 2 at respective inputs of an AND gate gives rise to an off-normal signal V 3 which, if of extended duration, passes a delay circuit to act as an alarm signal V 4 . A memory tripped by that alarm signal emits a permanent disconnect signal V 5 which either blocks the oscillator or fires a thyristor in shunt with the transistor whereby a fuse in series therewith is blown. The transistor may be one of four such transistors inserted in respective arms of a bridge, with two oscillators each driving a pair of these transistors and a common fuse in series with both pairs.
Inventors
- 👤 Luciano Franzolini
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 10:05
CPC Classifications
H; H02; H02H; H02H7/00; H02H7/10; H02H7/12
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
237 words
A power circuit comprising: a chopping transistor connected in series with a load across a supply of direct current, said transistor having a collector connected to the load, an emitter connected to a terminal of said supply and a base; an oscillator having an output connected to said base and further having a blocking input, said oscillator generating a train of control pulses periodically rendering said transistor conductive; threshold means connected to said collector for emitting a train of monitoring pulses of the same polarity as said control pulses in response to the collector/emitter voltage exceeding a predetermined limit during periods of cutoff of said transistor, said limit being also exceeded by a collector/emitter voltage occurring during conduction of said transistor upon an accidental short-circuiting of the load; an AND gate with inputs connected to the oscillator output and to said threshold means for emitting an off-normal signal in response to coincidence of a control pulse with a monitoring pulse; delay means connected to said AND gate for suppressing spurious transients and emitting an alarm signal only in the presence of an off-normal signal of at least a predetermined minimum duration which is less than the width of a control pulse; and memory means connected to said delay means for delivering a permanent disconnect signal to said blocking input upon being tripped by said alarm signal, thereby disabling said oscillator and preventing further conduction of said transistor.
Claim 2
Dependent Claim
237 words
A power circuit comprising: a chopping transistor connected in series with a load across a supply of direct current, said transistor having a collector connected to the load, an emitter connected to a terminal of said supply and a base; an oscillator having an output connected to said base and further having a blocking input, said oscillator generating a train of control pulses periodically rendering said transistor conductive; threshold means connected to said collector for emitting a train of monitoring pulses of the same polarity as said control pulses in response to the collector/emitter voltage exceeding a predetermined limit during periods of cutoff of said transistor, said limit being also exceeded by a collector/emitter voltage occurring during conduction of said transistor upon an accidental short-circuiting of the load; an AND gate with inputs connected to the oscillator output and to said threshold means for emitting an off-normal signal in response to coincidence of a control pulse with a monitoring pulse; delay means connected to said AND gate for suppressing spurious transients and emitting an alarm signal only in the presence of an off-normal signal of at least a predetermined minimum duration which is less than the width of a control pulse; and memory means connected to said delay means for delivering a permanent disconnect signal to said blocking input upon being tripped by said alarm signal, thereby disabling said oscillator and preventing further conduction of said transistor.
Claim 3
Dependent Claim
229 words
A power circuit comprising: a chopping transistor connected in series with a load across a supply of direct current, said transistor having a collector connected to the load, an emitter connected to a terminal of said supply and a base; an oscillator having an output connected to said base, said oscillator generating a train of control pulses periodically rendering said transistor conductive; threshold means connected to said collector for emitting a train of monitoring pulses in response to the collector/emitter voltage exceeding a predetermined limit during periods of cutoff of said transistor, said limit being also exceeded by a collector/emitter voltage occurring during conduction of said transistor upon an accidental short-circuiting of the load; gate means with inputs connected to the oscillator output and to said threshold means for emitting an off-normal signal in response to coincidence of a control pulse with a monitoring pulse; delay means connected to said gate means for suppressing spurious transients and emitting an alarm signal only in the presence of an off-normal signal of at least a predetermined minimum duration which is less than the width of a control pulse; and memory means connected to said delay means for applying a permanent disconnect signal to a blocking input of said oscillator upon being tripped by said alarm signal, thereby terminating the generation of said control pulses and preventing further conduction of said transistor.
Claim 4
Dependent Claim
229 words
A power circuit comprising: a chopping transistor connected in series with a load across a supply of direct current, said transistor having a collector connected to the load, an emitter connected to a terminal of said supply and a base; an oscillator having an output connected to said base, said oscillator generating a train of control pulses periodically rendering said transistor conductive; threshold means connected to said collector for emitting a train of monitoring pulses in response to the collector/emitter voltage exceeding a predetermined limit during periods of cutoff of said transistor, said limit being also exceeded by a collector/emitter voltage occurring during conduction of said transistor upon an accidental short-circuiting of the load; gate means with inputs connected to the oscillator output and to said threshold means for emitting an off-normal signal in response to coincidence of a control pulse with a monitoring pulse; delay means connected to said gate means for suppressing spurious transients and emitting an alarm signal only in the presence of an off-normal signal of at least a predetermined minimum duration which is less than the width of a control pulse; and memory means connected to said delay means for applying a permanent disconnect signal to a blocking input of said oscillator upon being tripped by said alarm signal, thereby terminating the generation of said control pulses and preventing further conduction of said transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-10-18 | 1986-04-19 | 1986-10-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-10-18 | 1990-04-19 | 1990-10-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-10-18 | 1994-04-19 | 1994-10-19 | $7700.00 | Window Closed / Lapsed |