US4354262A
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Logic system for controlling a modular multiplex connection unit in a time-division switching exchange
Assignee: Alcatel CIT SA
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Filing: 1980-05-05
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Granted: 1982-10-12
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Expires: 2000-05-05
Abstract
Abstract A control logic system comprising at least one sub-system including a master processor, two slave processors and an interchange memory which exchanges information between the master processor and the slave processors. The slave processors access a common memory via an interprocessor interface.
Inventors
- 👤 Jean Guezou
- 👤 Bernard LeDieu
- 👤 Jean-Pierre Martin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 22:00
CPC Classifications
H; H04; H04Q; H04Q11/00; H04Q11/04; H04Q11/0407
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
114 words
A logic system for controlling a modular multiplex connection unit including a plurality of connection modules in a time-division exchange, the logic system comprising at least one subsystem including a master processor (M), two slave processors (A, B) each controlling half the connection modules and each connected to a separate memory (8, 9), an interchange memory (2) connected to a common memory (7) and to the slave processors via a bus interface controller (3) and to the master processor, an interprocessor interface (1) connected to the master processor and to each slave processor, and an interchange interface (18) connected to the master processor and to markers and a monitoring unit of a switching centre.
Claim 2
Dependent Claim
114 words
A logic system for controlling a modular multiplex connection unit including a plurality of connection modules in a time-division exchange, the logic system comprising at least one subsystem including a master processor (M), two slave processors (A, B) each controlling half the connection modules and each connected to a separate memory (8, 9), an interchange memory (2) connected to a common memory (7) and to the slave processors via a bus interface controller (3) and to the master processor, an interprocessor interface (1) connected to the master processor and to each slave processor, and an interchange interface (18) connected to the master processor and to markers and a monitoring unit of a switching centre.
Claim 3
Dependent Claim
58 words
A system according to claim 1, wherein said logic system comprises two identical subsystems, each subsystem being connected to the same said multiplex connection unit with the master processor in each of said subsystems connected to a transfer unit (4) which switches between the subsystems, the interchange memory (2) in each subsystem being connected to the other subsystem.
Claim 4
Dependent Claim
18 words
A system according to claim 1 or claim 2, wherein the master processor and slave processors are identical.
Claim 5
Dependent Claim
28 words
A system according to claim 1 or claim 2, wherein the common memory (7) and the memories (8, 9) associated with the slave processors (A, B) are identical.
Claim 6
Dependent Claim
38 words
A logic system according to claim 1 or claim 2, wherein the slave processors access the interchange memory (2) via the bus interface controller (3), in the order of receipt of requests for access from the slave processors.
Claim 7
Dependent Claim
32 words
A system according to claim 1 or claim 2, wherein said connection unit comprises eight connection modules, each connection module being connected to four incoming multiplex lines and four outgoing multiplex lines.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-10-11 | 1986-04-12 | 1986-10-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-10-11 | 1990-04-12 | 1990-10-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-10-11 | 1994-04-12 | 1994-10-12 | $7700.00 | Window Closed / Lapsed |