US4350879A
Expired / Lapsed
US
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Time jitter determining apparatus
Assignee: University of Ottawa
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Filing: 1979-10-29
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Granted: 1982-09-21
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Expires: 1999-10-29
Abstract
Abstract The jitter determining apparatus uses only a jittery clock signal of period T b recovered from the received data signal to determine peak to peak jitter J pp and jitter distribution. The apparatus includes an AND gate having a pair of inputs. The inputs are coupled to a first signal which is the jittery clock signal delayed by a fixed amount nT b where n is preferably greater than 5, and to a second signal which is a jittery pulse signal generated from the jittery clock signal. The second signal is also controllably delayed by a factor greater than twice the jitter J pp . The AND gate produces output pulses when coincidence occurs between the two signals as the delay of the second signal is selectively varied. A counter counts the pulses for each selected delay position and thus provides the peak to peak time jitter J pp of the clock signal.
Inventors
- 👤 Kamilo Feher
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 21:19
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/20; H04L1/205; G; G01; G01R; G01R19/00; G01R19/175; G01R25/00; G01R25/005
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
123 words
Apparatus for determining time jitter of a clock signal of period T b , recovered from a received data signal, comprising: means for applying the clock signal to first and second signal paths; signal delay means for delaying the signals in the signal paths relative to one another by a variable delay factor; logic means coupled to the first and second signal paths for detecting coincidence of the relatively delayed clock signals, and detector means coupled to the logic means for indicating the coincidence rate of the relatively delayed clock signals, as the delay is varied, whereby peak to peak time jitter is half of the relative shift of the delay between the point of minimum coincidence and the point of maximum coincidence.
Claim 2
Dependent Claim
123 words
Apparatus for determining time jitter of a clock signal of period T b , recovered from a received data signal, comprising: means for applying the clock signal to first and second signal paths; signal delay means for delaying the signals in the signal paths relative to one another by a variable delay factor; logic means coupled to the first and second signal paths for detecting coincidence of the relatively delayed clock signals, and detector means coupled to the logic means for indicating the coincidence rate of the relatively delayed clock signals, as the delay is varied, whereby peak to peak time jitter is half of the relative shift of the delay between the point of minimum coincidence and the point of maximum coincidence.
Claim 3
Dependent Claim
43 words
Apparatus as claimed in claim 1 wherein the signal delay means includes: fixed delay means having a fixed delay factor positioned in one of the signal paths; and variable delay means having a variable delay factor positioned in one of the signal paths.
Claim 4
Dependent Claim
30 words
Apparatus as claimed in claim 2 wherein the fixed delay means is located in the first signal path and the variable delay means is located in the second signal path.
Claim 5
Dependent Claim
25 words
Apparatus as claimed in claim 2 or 3 wherein the fixed delay factor is nT b where n is equal to or greater than 5.
Claim 6
Dependent Claim
38 words
Apparatus as claimed in claim 2 or 3 wherein the variable delay means delay factor varies over a period greater than 2J pp where J pp is the peak to peak time jitter of the recovered clock signal.
Claim 7
Dependent Claim
33 words
Apparatus as claimed in claim 3 wherein the second signal path further includes a pulse generating means for generating a signal consisting of a train of narrow pulses from the recovered clock signal.
Claim 8
Dependent Claim
38 words
Apparatus as claimed in claim 1 which further includes control means coupled to the signal delay means to increment the relative delay between the signal in the signal paths over the variable delay factor, in a predetermined sequence.
Claim 9
Dependent Claim
106 words
Apparatus for determining time jitter of a clock signal of period T b , recovered from a received data signal, comprising: means for applying the clock signal to first and second signal paths; signal delay means for delaying the signals in the signal paths relative to one another by a variable delay factor; AND gate means having one input coupled to the signal in the first signal path and one input coupled to the signal in the second signal path; and counter means coupled to the AND gate means for counting the coincidence rate of pulses received from the AND gate, as the delay is varied.
Claim 10
Dependent Claim
106 words
Apparatus for determining time jitter of a clock signal of period T b , recovered from a received data signal, comprising: means for applying the clock signal to first and second signal paths; signal delay means for delaying the signals in the signal paths relative to one another by a variable delay factor; AND gate means having one input coupled to the signal in the first signal path and one input coupled to the signal in the second signal path; and counter means coupled to the AND gate means for counting the coincidence rate of pulses received from the AND gate, as the delay is varied.
Claim 11
Dependent Claim
43 words
Apparatus as claimed in claim 8 wherein the signal delay means includes: fixed delay means having a fixed delay factor positioned to one of the signal paths; and variable delay means having a variable delay factor positioned in one of the signal paths.
Claim 12
Dependent Claim
30 words
Apparatus as claimed in claim 9 wherein the fixed delay means is located in the first signal path and the variable delay means is located in the second signal path.
Claim 13
Dependent Claim
25 words
Apparatus as claimed in claim 9 or 10 wherein the fixed delay factor is nT b where n is equal to or greater than 5.
Claim 14
Dependent Claim
38 words
Apparatus as claimed in claim 9 or 10 wherein the variable delay means delay factor varies over a period greater then 2J pp where J pp is the peak to peak time jitter of the recovered clock signal.
Claim 15
Dependent Claim
33 words
Apparatus as claimed in claim 10 wherein the second signal path further includes a pulse generating means for generating a signal consisting of a train of narrow pulses from the recovered clock signal.
Claim 16
Dependent Claim
38 words
Apparatus as claimed in claim 8 which further includes control means coupled to the signal delay means to increment the relative delay between the signal in the signal paths over the variable delay factor, in a predetermined sequence.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-09-20 | 1986-03-22 | 1986-09-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-09-20 | 1990-03-22 | 1990-09-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-09-20 | 1994-03-22 | 1994-09-21 | $7700.00 | Window Closed / Lapsed |