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US4345323A Expired / Lapsed US ⏱️ 0.0 years remaining

Pulse duration digital multiplexing system

Assignee: TE Connectivity Corp
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Filing: 1980-01-07
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Granted: 1982-08-17
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Expires: 2000-01-07
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Abstract

Abstract Method for multiplexing of digital data is disclosed, to enable simultaneous transmission/reception of a number of digital signals over a single communication channel. A plurality of inputs are clocked in and assigned respective binary coded weights. The combined binary coded decimal value of the inputs determines the time duration of a generated digital pulse. The multiplexed data is thereby represented by the length or duration of the pulse. At the receiving end, the pulse is amplified and quantized to digital level and outputs generated in correspondence to the digital transmitter inputs.

Inventors

  • 👤 Paul S. Chang

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 11:39
CPC Classifications
H; H04; H04J; H04J3/00; H04J3/16; H04J3/1676

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 121 words
A multiplexing transmitter for simultaneous transmission of digital input signals over a single communication channel, comprising: registration means for clocking-in said multiple input signals at a sampling frequency; and binary counting means having multiple outputs sequentially activated according to a specific binary count for assigning each of said clocked-in signals a respective binary coded weight, so that a unique binary coded decimal value is specified by a combination of said coded weights of said clocked-in input signals, and said means including means for generating a pulse of a duration determined by said unique combined binary coded decimal value of said clocked-in input signals, and means for corresponding each of said input signals to a respective one of said counting means outputs.
Claim 2
Dependent Claim 121 words
A multiplexing transmitter for simultaneous transmission of digital input signals over a single communication channel, comprising: registration means for clocking-in said multiple input signals at a sampling frequency; and binary counting means having multiple outputs sequentially activated according to a specific binary count for assigning each of said clocked-in signals a respective binary coded weight, so that a unique binary coded decimal value is specified by a combination of said coded weights of said clocked-in input signals, and said means including means for generating a pulse of a duration determined by said unique combined binary coded decimal value of said clocked-in input signals, and means for corresponding each of said input signals to a respective one of said counting means outputs.
Claim 3
Dependent Claim 25 words
The multiplexing transmitter as set forth in claim 1, wherein said means for corresponding said input signals to said counting means outputs comprising a comparator.
Claim 4
Dependent Claim 37 words
The multiplexing transmitter as set forth in claim 1, wherein said counting means having a terminal output activated at the end of a counting sequence, with said activation of said terminal output occuring at said sampling frequency.
Claim 5
Dependent Claim 150 words
A multiplexing transmitter for simultaneous transmission of a set of digital input signals over a single communication channel, comprising: bit frequency generation means generating at a preset bit frequency; binary counting means for sequentially counting said frequency bits and having a plurality of outputs sequentially activated according to a specific binary count, said counting means having a terminal output activated at the end of a counting sequence, with said activation of said terminal output occurring at a sampling frequency; registration means for clocking-in said set of input signals at said sampling frequency; means for assigning each of said clocked-in signals a respective binary coded weight so that a unique binary coded decimal value is specified by a combination of said coded weights of said clocked-in input signals; and means for generating a pulse of a duration determined by said unique combined binary coded decimal value of said clocked-in input signals.
Claim 6
Dependent Claim 150 words
A multiplexing transmitter for simultaneous transmission of a set of digital input signals over a single communication channel, comprising: bit frequency generation means generating at a preset bit frequency; binary counting means for sequentially counting said frequency bits and having a plurality of outputs sequentially activated according to a specific binary count, said counting means having a terminal output activated at the end of a counting sequence, with said activation of said terminal output occurring at a sampling frequency; registration means for clocking-in said set of input signals at said sampling frequency; means for assigning each of said clocked-in signals a respective binary coded weight so that a unique binary coded decimal value is specified by a combination of said coded weights of said clocked-in input signals; and means for generating a pulse of a duration determined by said unique combined binary coded decimal value of said clocked-in input signals.
Claim 7
Dependent Claim 35 words
The multiplexing transmitter as set forth in claim 4, wherein said means for assigning binary coded weights comprising means for corresponding each of said input signals to a respective one of said counting means outputs.
Claim 8
Dependent Claim 25 words
The multiplexing transmitter as set forth in claim 5, wherein said means for corresponding said input signals to said counting means outputs comprising a comparator.
Claim 9
Dependent Claim 88 words
A de-multiplexing receiver for decoding an encoded pulse having a duration representing a combined binary coded decimal value of a set of digital input signals, comprising: means for registering said encoded pulse; binary counting means for deriving binary coded weight components having multiple outputs activated according to a specific binary count wherein each binary coded weight component corresponds to one of said binary counting means output count; and output pulse generating means for generating digital output signals, each corresponding to one of said derived binary coded weight components.
Claim 10
Dependent Claim 88 words
A de-multiplexing receiver for decoding an encoded pulse having a duration representing a combined binary coded decimal value of a set of digital input signals, comprising: means for registering said encoded pulse; binary counting means for deriving binary coded weight components having multiple outputs activated according to a specific binary count wherein each binary coded weight component corresponds to one of said binary counting means output count; and output pulse generating means for generating digital output signals, each corresponding to one of said derived binary coded weight components.
Claim 11
Dependent Claim 188 words
A multiplexing system for simultaneous transmission of a set of digital input signals over a single communication channel, comprising: a. a transmitter comprising: registration means for clocking-in said multiple input signals at a sampling frequency; binary counting means for assigning each of said clocked-in signals a respective binary coded weight so that a unique binary coded decimal value is specified by a combination of said coded weights of said clocked-in input signals, said means having multiple outputs sequentially activated according to a specific binary count, and means for corresponding each of said input signals to a respective one of said counting means outputs, and said binary counting means including means for generating an encoded pulse of a duration determined by said combination of said coded weights of said clocked-in input signals; and b. a receiver comprising: means for registering said encoded pulse; means for decoding binary coded weight components comprising said combination of said coded weights of said clocked-in input signals from said duration of said encoded pulse; and output pulse generating means for generating digital output signals, each corresponding to one of said binary coded weight components.
Claim 12
Dependent Claim 188 words
A multiplexing system for simultaneous transmission of a set of digital input signals over a single communication channel, comprising: a. a transmitter comprising: registration means for clocking-in said multiple input signals at a sampling frequency; binary counting means for assigning each of said clocked-in signals a respective binary coded weight so that a unique binary coded decimal value is specified by a combination of said coded weights of said clocked-in input signals, said means having multiple outputs sequentially activated according to a specific binary count, and means for corresponding each of said input signals to a respective one of said counting means outputs, and said binary counting means including means for generating an encoded pulse of a duration determined by said combination of said coded weights of said clocked-in input signals; and b. a receiver comprising: means for registering said encoded pulse; means for decoding binary coded weight components comprising said combination of said coded weights of said clocked-in input signals from said duration of said encoded pulse; and output pulse generating means for generating digital output signals, each corresponding to one of said binary coded weight components.
Claim 13
Dependent Claim 25 words
A multiplexing system as set forth in claim 8, wherein said means for corresponding said input signals to said counting means outputs comprising a comparator.
Claim 14
Dependent Claim 51 words
A multiplexing system as set forth in claim 8, wherein said receiver means for deriving said binary coded weight components comprising binary counting means having multiple outputs activated according to a specific binary count, each of said binary coded weight components corresponding to one of said binary counting means outputs count.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-08-16 1986-02-15 1986-08-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-08-16 1990-02-15 1990-08-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-08-16 1994-02-15 1994-08-17 $7700.00 Window Closed / Lapsed

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