Differential amplifier having a low-pass characteristic

Claim 2

A differential amplifier having a low-pass characteristic comprising, in combination: first and second amplifier input terminals for receiving an input signal thereacross; first and second capacitors; a voltage follower having an input terminal connected via said second capacitor to a point of reference potential; means for alternately connecting said first capacitor across said amplifier input terminals and connecting said first capacitor in parallel with said voltage follower during mutually exclusive time periods, and output means coupled to a point in said amplifier for providing an output voltage proportional to the state of charge of said second capacitor.

Claim 3

A differential amplifier having a low-pass characteristic comprising, in combination: first and second amplifier input terminals for receiving an input signal thereacross; first and second capacitors; a voltage follower having an input terminal connected via said second capacitor to a point of reference potential and being of a type exhibiting an offset voltage tending to cause said amplifier to exhibit an input offset voltage; means for alternately connecting said first capacitor across said amplifier input terminals and connecting said first capacitor in parallel with said voltage follower during mutually exclusive time periods; output means coupled to a point in said amplifier for providing an output voltage proportional to the state of charge of said second capacitor; a second voltage follower having an offset voltage substantially the same as that of the first mentioned voltage follower; and means for adding the offset voltage of said second voltage follower to said input signal in a sense to minimize said input offset voltage of said amplifier.

Claim 4

A differential amplifier having a low-pass characteristic comprising, in combination: first and second amplifier input terminals for receiving an input signal thereacross; first and second capacitors; a voltage follower having an input terminal connected via said second capacitor to a point of reference potential and being of a type exhibiting an offset voltage tending to cause said amplifier to exhibit an input offset voltage; means for alternately connecting said first capacitor across said amplifier input terminals and connecting said first capacitor in parallel with said voltage follower during mutually exclusive time periods; output means coupled to a point in said amplifier for providing an output voltage proportional to the state of charge of said second capacitor; a second voltage follower having an offset voltage substantially the same as that of the first mentioned voltage follower; and means for adding the offset voltage of said second voltage follower to said input signal in a sense to minimize said input offset voltage of said amplifier.

Claim 5

A differential amplifier having a low-pass characteristic comprising, in combination: first and second amplifier input terminals for receiving an input signal thereacross; first and second capacitors; a voltage follower having an input terminal connected via said second capacitor to a point of reference potential; electronic switch means responsive to a first control signal manifestation for coupling said first capacitor across said amplifier input terminals, responsive to a second control signal manifestation for isolating said first capacitor from said input terminals and from said voltage follower and responsive to a third control signal manifestation for connecting said first capacitor in parallel with said voltage follower; and output means coupled to a point in said amplifer for providing an output voltage proportional to the state of charge of said second capacitor.

Claim 6

A differential amplifier having a low-pass characteristic comprising, in combination: first and second amplifier input terminals for receiving an input signal thereacross; first and second capacitors; a voltage follower having an input terminal connected via said second capacitor to a point of reference potential; electronic switch means responsive to a first control signal manifestation for coupling said first capacitor across said amplifier input terminals, responsive to a second control signal manifestation for isolating said first capacitor from said input terminals and from said voltage follower and responsive to a third control signal manifestation for connecting said first capacitor in parallel with said voltage follower; and output means coupled to a point in said amplifer for providing an output voltage proportional to the state of charge of said second capacitor.

Claim 7

A differential amplifier as recited in claim 3 wherein said electronic switch means includes four transmission gates and further comprises timing pulse generator means for supplying a first control signal to one pair of the gates during a first time interval and a second control signal to another pair of the gates during a second nonoverlaping time interval, said generator comprising: an oscillator for producing an output signal; a phase splitter responsive to the oscillator output signal for producing two complementary output signals; a pair of gates for deriving said control signals from said complementary output signals; and a separate feedback path from the output of each gate to the input of the other for preventing said gates from being simultaneously enabled.

Claim 8

A differential amplifier as recited in claim 2 wherein said output means comprises: an output terminal; and means coupling said output terminal to said input terminal of said voltage follower.

Claim 9

A differential amplifier as recited in claim 2 wherein said output means comprises: an output terminal; and means coupling said output terminal to an output terminal of said voltage follower.

Claim 10

A differential amplifier having a low-pass characteristic comprising: an inverting amplifier input terminal and a non-inverting amplifier input terminal for receiving a differential input voltage thereacross; an input capacitor and an output capacitor; a first voltage follower having an input terminal connected via said output capacitor to a point of reference potential; a second voltage follower having an input terminal connected to one of said amplifier input terminals; switch means for alternately connecting said input capacitor across an output terminal of said second voltage follower and the other of said amplifier input terminals and for connecting said input capacitor in parallel with said first voltage follower during mutually exclusive time intervals; and an output terminal coupled to a point in said amplifier for providing an output voltage proportional to the state of charge of said output capacitor.

Claim 11

A differential amplifier having a low-pass characteristic comprising: an inverting amplifier input terminal and a non-inverting amplifier input terminal for receiving a differential input voltage thereacross; an input capacitor and an output capacitor; a first voltage follower having an input terminal connected via said output capacitor to a point of reference potential; a second voltage follower having an input terminal connected to one of said amplifier input terminals; switch means for alternately connecting said input capacitor across an output terminal of said second voltage follower and the other of said amplifier input terminals and for connecting said input capacitor in parallel with said first voltage follower during mutually exclusive time intervals; and an output terminal coupled to a point in said amplifier for providing an output voltage proportional to the state of charge of said output capacitor.

Claim 12

A differential amplifier as recited in claim 7 wherein said input terminal of said second voltage follower is coupled to said inverting amplifier input terminal and wherein said switch means comprises: a first transmission gate having a conduction path connected between a first plate of said input capacitor and said noninverting amplifier input terminal; a second transmission gate having a conduction path connected between a second plate of said input capacitor and said output terminal of said second voltage follower; a third transmission gate having a conduction path connected between an output terminal of said first voltage follower and said second plate of said input capacitor; a fourth transmission gate having a conduction path connected between said input terminal of said first voltage follower and said first plate of said input capacitor; and timing pulse generator means coupled to said transmission gates for periodically closing said first and second transmission gates during a first time interval and for closing said third and fourth transmission gates during a second nonoverlapping time interval.

Claim 13

An amplifier comprising, in combination: two input terminals; first and second capacitors; a voltage follower having an input terminal coupled to a point of reference potential via said second capacitor; and switch means for alternately connecting said first capacitor to said two input terminals and connecting said first capacitor in parallel with said voltage follower during mutually exclusive time intervals.

Claim 14

An amplifier comprising, in combination: two input terminals; first and second capacitors; a voltage follower having an input terminal coupled to a point of reference potential via said second capacitor; and switch means for alternately connecting said first capacitor to said two input terminals and connecting said first capacitor in parallel with said voltage follower during mutually exclusive time intervals.