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US4340781A Expired / Lapsed US ⏱️ 0.0 years remaining

Speech analysing device

Assignee: Hitachi Ltd
•
Filing: 1980-04-30
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Granted: 1982-07-20
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Expires: 2000-04-30
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Abstract

Abstract Computation of the partial correlation coefficients (PARCOR K i ) of a signal, using less cascaded hardware, is implemented by first deriving a sequence of auto-correlation coefficients (v j ) which are then transformed into a sequence of K i using a single section digital filter plus recirculating circuitry for data iteration.

Inventors

  • 👤 Akira Ichikawa
  • 👤 Kazuo Nakata
  • 👤 Akira Nakajima
  • 👤 Yoshihiro Ohta
  • 👤 Kazuhiro Umemura

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 05:06
CPC Classifications
G; G10; G10L; G10L25/00

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 102 words
A speech analysing device comprising a correlator for obtaining an auto-correlation coefficient sequence of input speech signals, a computation portion for obtaining a partial auto-correlation coefficient sequence of said input speech signals, and a data circulation portion coupled to both said correlator and said computation portion to receive as its input said auto-correlation coefficient sequence and said partial auto-correlation coefficient sequence, wherein an output of said data circulation portion is coupled to an input of said computation portion so that output signals of said data circulation portion are employed as input signals to said computation portion for obtaining said partial auto-correlation sequence.
Claim 2
Dependent Claim 102 words
A speech analysing device comprising a correlator for obtaining an auto-correlation coefficient sequence of input speech signals, a computation portion for obtaining a partial auto-correlation coefficient sequence of said input speech signals, and a data circulation portion coupled to both said correlator and said computation portion to receive as its input said auto-correlation coefficient sequence and said partial auto-correlation coefficient sequence, wherein an output of said data circulation portion is coupled to an input of said computation portion so that output signals of said data circulation portion are employed as input signals to said computation portion for obtaining said partial auto-correlation sequence.
Claim 3
Dependent Claim 109 words
The speech analysing device as defined in claim 1 wherein said data circulation portion comprises; two independent shift registers; a digital filter using either one of two output signals from said shift registers and said partial auto-correlation coefficient sequence from said computation portion as its input signals; and two switching circuits for selecting two output signals from said digital filter at predetermined timings, respectively; said two output signals from said digital filter being fed back to the corresponding input of said shift registers, respectively; said output signals of said two switching circuits being used as the input signals to said computation portion for obtaining said partial auto-correlation coefficient sequence.
Claim 4
Dependent Claim 165 words
The speech analysing device as defined in claim 1 wherein said data circulation portion comprises; an addition circuit; a first switching circuit for selecting either said auto-correlation coefficient sequence from said correlator or output signals from said addition circuit; a first shift register for storing the output signal from said first switching circuit; a second switching circuit for selecting either the output signal of said first shift register or that of said first switching circuit at a predetermined timing; a second shift register for storing the output of said second switching circuit; a third shift register for storing the output signal of said partial auto-correlation coefficient computation portion receiving the output signal of said first switching circuit as its input signal; and a multiplier for multiplying a signal corresponding to the output of said third register and the output signal of said second register; the output signal of said multiplier and that of said first register being applied as input signals to said addition circuit.

References Cited (Backward Citations)

US4052563A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-07-19 1986-01-18 1986-07-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-07-19 1990-01-18 1990-07-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-07-19 1994-01-18 1994-07-20 $7700.00 Window Closed / Lapsed

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