Automatic control system for method and apparatus for checking devices of an automotive vehicle in use with a microcomputer

Claim 1

In a control system for an automotive vehicle for controlling various devices in response to sensor signals fed from sensors, said system having a microcomputer for receiving and processing said sensor signals and for controlling said devices, said microcomputer including an input unit, an output unit, a CPU, and a memory storage device including a ROM and a RAM, a method of controlling said vehicle and checking operation of said microcomputer comprising steps of: (a) operating a control program in said microcomputer in response to said sensor signals for controlling said vehicle devices, (b) determining in said CPU and in response to said sensor signals at least a first and a second engine condition, (c) in response to said first determined engine condition, operating a first checking program for checking operation of said memory storage device, operation of said first checking program including the steps of: (i) in said RAM, feeding into said RAM a first plurality of data signals corresponding to a first set a data values, (ii) reading out of said RAM said fed-in data signals, (iii) comparing each of said read out data signals with each of said first plurality of data signals and generating a first error signal upon non-equivalence of same, (iv) providing an indication of said first error signal, (v) in said ROM, reading a second plurality of data values from storage locations of said ROM, (vi) comparing at least the least significant bits of the sum of said read data values with a reference sum and generating a second error signal upon non-equivalence thereof, (vii) providing an indication of said second error signal, (d) in response to said second determined engine condition, operating a second checking program for checking operation of at least one of said input and output units, said second checking progrom including the steps of: (i) for said input unit, feeding into said input unit a third plurality of data signals corresponding to a third set of data values, (ii) comparing in said CPU said third set of data values with one set of reference values stored in said memory storage device, (iii) generating a third error signal if each of said third set of data values is not equal to each of said one set of reference values, (iv) providing an indication of said third error signal, (v) for said output unit, feeding a fourth plurality of data signals corresponding to a fourth set of data values from said memory device to said output unit, (vi) comparing said fourth set of data values with another set of reference values, (vii) generating a fourth error signal if each of said a fourth set of data values is not equal to each of said other set of reference values, and (viii) providing an indication of said fourth error signal.